- #1
powermelm
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Hi there,
I have been working on the design of an inverter board which has to be capable of power ratings of up to 3KW for my final year project. The inverter is to be used for input and output in three phase. I have completed basic hardware, that is three phase diode bridge, optocoupler between my controller and gate drivers, gate driver circuitry and IGBTs (six switch topology). My power testing has been successful up to only 500VA so far... :( The problem was that it was time for me to change from square wave switching to a more efficient modulation technique. I have chosen the Sine PWM technique.
How did i implement it?
I simulated the circuit, natural sampling: Sine wave compared against traingular wave, and I have noted down the pulse width values for the first half-cycle. In my software I have stored these values in a look up table and I have derived my gating signals for all the 6 switches. 120 degrees phase shift for the High side IGBTs and the Low side IGBTs are in turn out of phase with the HS igbts. In all I got a six step gate pattern. Of course I had to add dead-time at beginning and end of gate patterns, but time period still within 20ms.
Now my problem: testing with resistive load, still at low power though, so far is good. For combination of resistive and inductive load up to 200VA (at load side) was very satisfactory, low distortion and low voltage spikes... However when I increased to 300VA, though my line-line voltages are balanced, my phase-neutral voltages are totally different by a large amount. Despite reading a lot of literature I failed to understand why? Has anybody dealt with it before?
I have been working on the design of an inverter board which has to be capable of power ratings of up to 3KW for my final year project. The inverter is to be used for input and output in three phase. I have completed basic hardware, that is three phase diode bridge, optocoupler between my controller and gate drivers, gate driver circuitry and IGBTs (six switch topology). My power testing has been successful up to only 500VA so far... :( The problem was that it was time for me to change from square wave switching to a more efficient modulation technique. I have chosen the Sine PWM technique.
How did i implement it?
I simulated the circuit, natural sampling: Sine wave compared against traingular wave, and I have noted down the pulse width values for the first half-cycle. In my software I have stored these values in a look up table and I have derived my gating signals for all the 6 switches. 120 degrees phase shift for the High side IGBTs and the Low side IGBTs are in turn out of phase with the HS igbts. In all I got a six step gate pattern. Of course I had to add dead-time at beginning and end of gate patterns, but time period still within 20ms.
Now my problem: testing with resistive load, still at low power though, so far is good. For combination of resistive and inductive load up to 200VA (at load side) was very satisfactory, low distortion and low voltage spikes... However when I increased to 300VA, though my line-line voltages are balanced, my phase-neutral voltages are totally different by a large amount. Despite reading a lot of literature I failed to understand why? Has anybody dealt with it before?
