Pull Up resistor in the Voltage?

[Muhammad Usman]

Hi,

May be this is the most basic question, but I don't understand the concept of pull up resistor and how they maintain the voltage value. For example let's take an example of below circuit. There is 5 volts battery and then there is 10K resistor which is further connected with the Vout which is most probably the load.

If we replace the load (Vout) with the resistor and see the voltage or make the load 1000K ohm to get the 5 volts then the circuit will be something like this.

So if we use the KVL to find the voltage across the load resistor will not be 5 volts, it will be way way less so that's what I want to ask how this pull up resistor work or may be my understand is entirely wrong, Please can you help to understand the concept correctly.

 

[Borek]

You did something wrong with images, the ones that show have nothing to do with what you posted.

Pull-up and pull-down resistors can be typically easily explained in terms of a voltage divider, it is just a matter of finding out what is the other resistance.

 

[Muhammad Usman]

You did something wrong with images, the ones that show have nothing to do with what you posted.

Pull-up and pull-down resistors can be typically easily explained in terms of a voltage divider, it is just a matter of finding out what is the other resistance.

Yes i got it i don't know i just pasted the snapshots

 

[Muhammad Usman]

Now its ok

 

[Muhammad Usman]

Yes i got it i don't know i just pasted the snapshots

can you help to check now

 

[CWatters]

When using pull up resistors you cannot use an arbitrary small load. If the following circuit is a logic gate you have to ensure that the minimum logic 1 voltage can be maintained for that family of logic gates or they may not work correctly.

You also have to be careful that the capacitance of any load doesn't slow down the rise time too much. If it does then you may need to make sure any following logic has Schmitt trigger inputs (hysteresis).

 

[CWatters]

In short you have to reduce the value of the pull up resistor and increase the value of the load resistor. The pull up resistor cannot be too small either. The open collector/open drain can only sink so much current or the logic 0 level will rise out of spec.

 

[jim hardy]

So if we use the KVL to find the voltage across the load resistor will not be 5 volts, it will be way way less so that's what I want to ask how this pull up resistor work or may be my understand is entirely wrong, Please can you help to understand the concept correctly.

Did you not do the arithmetic ? Just looking at your circuit i can see Vout will be ~4.95 volts which is certainly not "way way less" than 5v.

Always check your intuition by using your math. Else your intuition never gets any better.

 

[CWatters]

I just noticed that he has a 1M load. I miss read it as a 1K.

 

[phinds]

Did you not do the arithmetic ? Just looking at your circuit i can see Vout will be ~4.95 volts which is certainly not "way way less" than 5v.

Always check your intuition by using your math. Else your intuition never gets any better.

 

[berkeman]

I just noticed that he has a 1M load. I miss read it as a 1K.

I did the same thing, Doh!

Great minds think alike make the same mistakes...

 

[Bandit127]

Many moons ago I was part of a project where the objective was to build a digital audio preamp. There were 3 of us and we didn't specify what logic family we were going to work with. They used TTL for the power supply and audio processing and I used CMOS for the front panel functions (input, volume etc). It didn't function correctly. My bit didn't function at all.

We eventually worked out the malfunction was due to a difference in logic levels. TTL can output 2.7V for high where CMOS needs a minimum of 3.5V to "see" a high signal. Don't ask me what values I used for them but pull up resistors on the TTL outputs sorted it out. In this case pulling up from a 5V rail to 4V would have been fine, I think I did better than that. If I had needed to pull 2.7V up to 5.00V I would have had a lot more work to do.

 

[Baluncore]

So if we use the KVL to find the voltage across the load resistor will not be 5 volts, it will be way way less

That quoted information, with the text 1000K, only makes sense if the load is 1000R, 1.000k or 1k. We are so used to being given unreliable information that it is hard to know where the misunderstanding lies.
Also, the upper case multiplier 'K' plays emphasis tricks with the sight reading mind. It should have been written as 'k' in lower case, or as 1M0.

Divider current would be 5 / (1000k + 10k) = 4.95 uA
The load voltage would be 1000k * 4.95 uA = 4.95 V
The voltage dropped across the pull-up resistor would be 10k * 4.95 uA = 49.5 mV.

So it appears the OP analysed the divider upside down.

 

[Windadct]

Worth noting - the "load" can be a CMOS gate - so even the 1M Ohm "model" is not accurate, it may be slightly capacitive and very low leakage (all current = heat) so when left floating with no pull up or down resistor then the V of the gate is undefined... and particularly susceptible to noise. ( Even 1M ohm internal resistance could probably be disturbed if close to a noisy circuit - PWM motor current anyone? )
Furthermore, different technologies may have different input stages, the "standard" way of using 10K input pull up/down resistors, helps to prevent errors when technologies are changed - or the application circuit is ported from one system to another, as the specific input details do not have to be reconsidered for every application.

Edit -> I skimmed over this TI note, seems to touch on some of these points.