Using 2N3904 for 3V audio preamp

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Discussion Overview

The discussion centers on designing a voltage divider biased pre-amplifier using a 2N3904 transistor powered by a 3.3 volt supply. Participants explore the challenges of achieving a gain of about 50 with a low input signal level and source resistance, while addressing issues related to input impedance and quiescent point stability.

Discussion Character

  • Exploratory
  • Technical explanation
  • Debate/contested
  • Mathematical reasoning

Main Points Raised

  • One participant describes their initial design using a 2N3904, noting that small resistor values lead to low input impedance and questioning how to improve the amplifier design.
  • Another participant suggests a gain formula involving resistors R4 and R5, implying a potential solution without elaborating on specifics.
  • A participant interprets a circuit involving a second transistor (Q2) as a time-varying current valve that helps maintain the quiescent point of Q1, seeking confirmation of their understanding.
  • Some participants express uncertainty about the adequacy of the proposed circuit for achieving the desired gain, highlighting the 2N3904's minimum beta and suggesting alternative configurations, including operational amplifiers and JFETs for higher input impedance.
  • One participant mentions their background in electronics and expresses intent to experiment with various configurations, including a CD4069 hex inverter and an n-channel JFET, based on advice received.
  • A later reply indicates a decision to pursue the FET approach, reflecting a shift in design strategy.

Areas of Agreement / Disagreement

Participants do not reach a consensus on a single solution, as multiple competing approaches and configurations are proposed. The discussion remains open-ended with various suggestions and interpretations presented.

Contextual Notes

Participants express uncertainty regarding the effectiveness of the 2N3904 in achieving the desired gain and the implications of using low-value resistors on input impedance. The discussion includes various assumptions about circuit behavior and component characteristics that are not fully resolved.

Who May Find This Useful

Individuals interested in audio amplifier design, transistor applications, and circuit optimization may find the discussion relevant, particularly those exploring low-voltage configurations and alternative components.

Inventive
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I want to use a 3.3 volt supply to power a voltage divider biased pre-amplifier using a 2N3904. My input signal level is 50mv p-p with a 50 ohm source resistance. I am looking for a gain of about 50. After doing the math and building the circuit, my design works, but in order to get a adequate quiescent point I have to use small valued resistors. As a result of this, I end up with a very low complex input impedance when I connect my signal source.
My question is what would be a better approach to the amplifier design?
 
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Try something like this:
FIG_TS-6-19.gif

The gain is approximately 1 + R4/R5.
 
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Thanks everyone for your help. I am sure if I replied properly to Svein, but it looks like there is the usual voltage divider bias circuit consisting of Q1 with the addition of Q2. It looks like Q2 is being used as time varying current valve. When the collector voltage at Q1 is lower than the voltage at the base of Q2 (Vcc-vbe of Q2) then Q2 conduct a current which generates a time varying voltage across R4 and R5. Q2 also functions to not load or disturb the Q point of Q1. That AC signal can be coupled through C2. Now my load will see a AC output impedance of Xc2 (capacitive reactance of C2) plus R4 + R5 or just R4 + R5 if I neglect C2's impedance effects. Is my interpretation correct? Thanks
 
Inventive said:
Is my interpretation correct?
Yes - sort of.

Now - back your original problem. I am not sure that the circuit I copied for you is the complete answer to your needs. The 2N3904 has a minimum beta or current gain of 100. Getting a gain of 50 out of a single transistor circuit is going to be problematic. I shall sketch some additional solutions for you to choose between (my motto is: Do not commit yourself until you have at least 5 solutions to choose between).
  1. Use a low voltage operational amplifier like OPA322 (http://www.ti.com/product/opa322/datasheet) and connect it in a positive gain configuration.
    upload_2017-3-9_16-9-42.png
    The gain is 1 + Rf/Rg
  2. Use a CMOS inverter (4069UB) and connect it as an amplifier
    cmos-amp-png.73527.png
  3. Use a self - biasing amplifier, like this:
    upload_2017-3-9_16-9-42.png
  4. Use a JFET instead of the 2N3904. This will give you a higher input impedance
    amp14.gif
  5. Or go with the circuit I gave you, but modify it until it works (I would personally try to self-bias the first stage as in point 3. above
(Edit) Somehow the circuit that should be attached to point 1 is shown as an attachment in the bottom of my post and the circuit belonging to point 3 is shown instead - I don't know why!
 

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Svein said:
Yes - sort of.

Now - back your original problem. I am not sure that the circuit I copied for you is the complete answer to your needs. The 2N3904 has a minimum beta or current gain of 100. Getting a gain of 50 out of a single transistor circuit is going to be problematic. I shall sketch some additional solutions for you to choose between (my motto is: Do not commit yourself until you have at least 5 solutions to choose between).
  1. Use a low voltage operational amplifier like OPA322 (http://www.ti.com/product/opa322/datasheet) and connect it in a positive gain configuration.
    View attachment 114291 The gain is 1 + Rf/Rg
  2. Use a CMOS inverter (4069UB) and connect it as an amplifier
    cmos-amp-png.73527.png
  3. Use a self - biasing amplifier, like this:
    View attachment 114291
  4. Use a JFET instead of the 2N3904. This will give you a higher input impedance
    amp14.gif
  5. Or go with the circuit I gave you, but modify it until it works (I would personally try to self-bias the first stage as in point 3. above
(Edit) Somehow the circuit that should be attached to point 1 is shown as an attachment in the bottom of my post and the circuit belonging to point 3 is shown instead - I don't know why!
Thanks for you help. I found a CD4069 hex inverter in my supply of parts, and a n channel JFET. I think I will take your advice and try many different configurations that have shown me. I majored in electronics (B.S.) a long time ago and have become interested in circuit design and it's application again as a hobby. With my first circuit I though a gain 50 could be attained with a single transistor using the r'e model since I am working at lower frequencies. Thanks again for your time.
 
Thanks everyone for your input. I went with the FET approach
 

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