What are some techniques for filtering and amplifying pulse signals?

[meBigGuy]

Can you post a picture of positive pulses followed by negative pulses at the min and max levels.

Unlikely possibility 1:
It seems like you can trigger on the rising edge of both, which effectively becomes the leading edge of the positive pulse and the training edge of the negative pulse. Like putting a comparator at 0.4V and using it to fire the 1 shot. I expect when positive follows negative and vice versa it won't be so clean though.

Possibility 2:
At open loop gain op-amps make good (although slow) comparators. Use +- 0.8 volts as the references and deal with the "digital" output of the final two opamps.

Make a "short pulse" detector. If a positive pulse fires timer1, it enables a gate to fire timer2 if the pulse drops before timer1 times out. Do the same thing with the negative side.

Did that make sense?

BTW, using an ADC and figuring it out in the MPU is a good idea if you have the cycles.

 

[petterg]

An outline of the way I'd approach this. I'd look at using a PLL chip to regenerate that 5kHz clocking signal (or at least a squarewave synchronous with it). Because each transition of that timing squarewave co-incides with the pulse position, sample your analog signal at that time using a sample-and-hold. Compare the amplitude of that sample with the analog signal a moment later, just beyond the pulse position. From their relative amplitudes deduce the polarity of that pulse.

EDITED

I don't think I fully understood your idea. Regenerating signal will be easy. In order to have any further use of it it has to be in sync. Making sync will require signal amplitude within a certain range from the original signal. Wouldn't that just be a new angle to run into the same issue?

 

[petterg]

Can you post a picture of positive pulses followed by negative pulses at the min and max levels.

The swap from positive to negative (and back) happens by amplitude going gradually down to 0, then increase gradually. There will be at least 1000 pulses from max positive to max negative.

Unlikely possibility 1:
It seems like you can trigger on the rising edge of both, which effectively becomes the leading edge of the positive pulse and the training edge of the negative pulse. Like putting a comparator at 0.4V and using it to fire the 1 shot. I expect when positive follows negative and vice versa it won't be so clean though.

For the incoming signal I can trigger at any edge. After the differentiator there may be too many edges. Trigger has to be on leading edge. If you're thinking of a one shot after the differentiator, how would it know which edge to trigger?
If you're thinking of a one shot on the original (amplified) pulse, there is the issues of amplitude range from weaker than trigger level to stronger than clipping. Clipping causes multiple trigger edges. How would the one shot go clear of that?

Possibility 2:
At open loop gain op-amps make good (although slow) comparators. Use +- 0.8 volts as the references and deal with the "digital" output of the final two opamps.

Make a "short pulse" detector. If a positive pulse fires timer1, it enables a gate to fire timer2 if the pulse drops before timer1 times out. Do the same thing with the negative side.

Did that make sense?

I though so, until I tried to sketch some blocks and realized I was lost.

BTW, using an ADC and figuring it out in the MPU is a good idea if you have the cycles.

Looks like it. I still can't believe suppressing a slow sine should be this complicated thou.

 

[meBigGuy]

I am assuming that "differentiator" means high pass filter. I am looking at the output (blue and green) waveforms and assuming that if I looked at 1 output that is what I would see for positive and negative. Maybe I need to see the input to the two final amps.

Background:
Do you understand how you can use an opamp as a comparator. Put 0.4V DC reference on the minus input (with no feedback resistor). When the plus input goes above 0.4 the output slams to the positive rail, and vice versa. You can do tricks like make the threshold a fraction of the peak voltage (with a time constant for attack and decay). If you use an actual comparator chip the output goes from 0 to +V (sometimes determined by an output pullup resistor) which is easier to work with than -V to +V. A comparator converts analog domain to digital domain.

Regarding Method 1
Observe all the blue and green positive crossings at +0.4V. There are positive crossings from the leading edge of positive pulses, and positive crossings from the trailing edges of negative pulses. If you triggered on those (after a comparator), you have total pulses, but still need a way to determine whether it was a positive or negative input pulse. Not sure of the best way to determine that.

Regarding Method 2: Just think about positive crossings at +0.8V for now, then you can apply the same logic for negative crossings at -0.8V.

The goal is to trigger an output pulse when there are short pulses. Basically fire a timer on the positive edge, and then fire another timer on the negative edge if the first timer is still true.

Fire timer 1 which is X ms (always longer than the pulse). Logically AND the inverse of the input pulse with the output of the timer and use that to fire timer 2. When the input pulse goes low it fires timer 2.

Regarding AGC:
What is making this hard is there is no gain control. If the gain varied such that you always got the lower picture, this would be easy. With your slow variations, buuilding in AGC would be easy. If you did it digitally, that is essentially what you would do.

 

[petterg]

I am assuming that "differentiator" means high pass filter. I am looking at the output (blue and green) waveforms and assuming that if I looked at 1 output that is what I would see for positive and negative. Maybe I need to see the input to the two final amps.

A differnetiator is similar to a highpass, but different. It does the opposite of an integrator. In post #30 you see the input (green) to the differentiator and its output (blue).
https://www.physicsforums.com/showpost.php?p=4500465&postcount=30

Input to the final two opamps is equal to the output of the differentiator, just amplified more to handle the weak signals (which causes clipping on strong signals).

Background:
Do you understand how you can use an opamp as a comparator. Put 0.4V DC reference on the minus input (with no feedback resistor). When the plus input goes above 0.4 the output slams to the positive rail, and vice versa. You can do tricks like make the threshold a fraction of the peak voltage (with a time constant for attack and decay). If you use an actual comparator chip the output goes from 0 to +V (sometimes determined by an output pullup resistor) which is easier to work with than -V to +V. A comparator converts analog domain to digital domain.

I know the comparator behavior. But I don't see how comparing to a fixed level will work, unless passed through AGC first. The variable offset of the input will cause trouble. That's back to the idea I wrote in the first post, as highpass didn't work, do a low pass, and compare/subtract the lowpass filtered signal to the original. Maybe combining the lowpassed signal with an fixed offset with a sign decided by last pulse direction, and use that combined result to compare to the original would do better. Don't know how to combine them in a way that makes sense thou.

Regarding Method 1
Observe all the blue and green positive crossings at +0.4V. There are positive crossings from the leading edge of positive pulses, and positive crossings from the trailing edges of negative pulses. If you triggered on those (after a comparator), you have total pulses, but still need a way to determine whether it was a positive or negative input pulse. Not sure of the best way to determine that.

The hole goal is to determine if the pulses are positive, negative, or none. The pulses them self doesn't really matter. All I need to know is if there are any pulses, and if so which direction do they have.

Regarding Method 2: Just think about positive crossings at +0.8V for now, then you can apply the same logic for negative crossings at -0.8V.

The goal is to trigger an output pulse when there are short pulses. Basically fire a timer on the positive edge, and then fire another timer on the negative edge if the first timer is still true.

Fire timer 1 which is X ms (always longer than the pulse). Logically AND the inverse of the input pulse with the output of the timer and use that to fire timer 2. When the input pulse goes low it fires timer 2.

That sounds like the 555-hold-reset I'm writing in post #40 and #47. That ran into an issue that the timer need to have the ability to trigger it's output on positive edge, don't start timer until negative edge, and retrigger timer on next positive edge. I have a theory that this should be possible to do with a 555 monostable with addition of a transistor in parallel with the timing capacitor. The transistor should be controlled by the input signal, but I haven't succeeded to make it work. The thing is that the capacitor have one pin to ground and a charge between 0V and 3.3V. The idea is to discharge the capacitor trough the transistor when input signal has a voltage of less than 1.7V (or more than 3.3V if using the inverted input). Using voltage dividers that was possible, but discharge became too slow.

Regarding AGC:
What is making this hard is there is no gain control. If the gain varied such that you always got the lower picture, this would be easy. With your slow variations, buuilding in AGC would be easy. If you did it digitally, that is essentially what you would do.

I've tried to look into that. They seem very complex, and schematics uses symbols I've no clue what is. That scares me off in favor of MPU.

 

[meBigGuy]

That sounds like the 555-hold-reset I'm writing in post #40 and #47. That ran into an issue that the timer need to have the ability to trigger it's output on positive edge, don't start timer until negative edge, and retrigger timer on next positive edge. I have a theory that this should be possible to do with a 555 monostable with addition of a transistor in parallel with the timing capacitor. The transistor should be controlled by the input signal, but I haven't succeeded to make it work. The thing is that the capacitor have one pin to ground and a charge between 0V and 3.3V. The idea is to discharge the capacitor trough the transistor when input signal has a voltage of less than 1.7V (or more than 3.3V if using the inverted input). Using voltage dividers that was possible, but discharge became too slow.

You are making it harder than it is. Use a comparator with 0.8V reference and two timers to detect short pulses as I outlined. Then do the same for a comparator with -0.8V reference.

That is a total of two comparators and 4 positive edge triggered one shots. You get two pulse streams, one for positive pulses and one for negative.

 

[NascentOxygen]

I don't think I fully understood your idea. Regenerating signal will be easy. In order to have any further use of it it has to be in sync. Making sync will require signal amplitude within a certain range from the original signal. Wouldn't that just be a new angle to run into the same issue?

I think it would have the ability to correctly detect pulses buried in noise far better than an arrangement without the stability of a closed loop.

But I do think you should direct further effort into filtering out the predominant low-frequency interference. I don't know what you did wrong with your filter tests, but I can't see how there can be any difficulty removing it while preserving the waveshape you seek. I might take a closer look at the task myself.

 

[meBigGuy]

I don't know what you did wrong with your filter tests, but I can't see how there can be any difficulty removing it while preserving the waveshape you seek.

I tend to agree

 

[petterg]

Nothing would be better than using filter. Everything else has been attempts to find a workaround.
Post #16 has the highpass filter.
https://www.physicsforums.com/showpost.php?p=4496667&postcount=16

Do you see why it's not doing any good?

 

[jim hardy]

Post 16:

------------------------------------------------------------------------------------------------------------

Attached is my highpass approach.
Input is wires coming in from the left.
U1A is virtual ground generator.
U1B is an impedance buffer, having a DC block before it.
U1C and the RC's in front of it is the highpass filter.

Ch.A on the scoop is output from U1B. It's almost flat between the pulses. Voltage in the pulse max is about 4 times the level of voltage between the pulses.
Ch.B is output from U1C. It's starting to look more like sawtooth. Voltage in the pulse max is only about double the level of voltage between the pulses. And the voltage between the pulses are stronger than before the filter. So I've managed to get only the negative effects of the filter, none of the positive ones.

That's why I don't think highpass is the way to go.
Next up is lowpass + comparator.

----------------------------------------------------------------------------------------------------------

Do you see why it's not doing any good?

No.

1. Are we really dealing with one millivolt of signal?
2. What's wrong with ch A ? Looks to me like it makes whatever is the input signal into negative going pulses.

 

[petterg]

1) 1.5mV is the lowest expected pulse. Signal is a little bit weakened by C1. At some point I increased C1 from 30nF to 50nF. Then the resulting amplitude was closer to 1,5mV.
2) Where do you see that?
(Ni Multisim did quite a bit of things that didn't make sense to me)

 

[jim hardy]

2) Where do you see that?

On your oscilloscope screenshot, the red trace that looks flat between negative going pulses.

The ~half millivolt level between pulses is within LM324's input offset(2mv max, 1mv typical) and could be zeroed out.

 

[petterg]

The half mV is for the weakest signal only. Strongest signal is 300 times larger (both drifting offset and pulse). A dynamic way to zero it out would solve the problem perfectly.
I recreated the highpass circuit in LT spice, with the same result as Multisim. I've tested both weak and strong signals. The "flat" area between pulses after the buffer (U1B) seems to start climbing towards the pulse. When the pulse comes almost 5% of the pulse amplitude has already been a part of the almost flat area between the pulses.

In this digital world I'd believe pulse signal would be quite common. How come google gives med nothing about applying filter to pulse signals?

 

[meBigGuy]

Search for impulse response and step response to see what filters do to pulses.

I think you are done if you implement my short pulse detector. Is there a problem with that? 2 comparators and 4 one shots and some logic.

Maybe it's time to think about an AGC. The AD8336 is a variable gain amplifier (there are others). Here is an app note: http://www.analog.com/static/imported-files/application_notes/AN_934.pdf that shows one implementation.

Here is an application note that talks about the gain control implementation in a TI CODEC chip. : http://www.ti.com/lit/an/snaa028a/snaa028a.pdf It's more of an example of AGC in a general way, although it would provide a nice digital ADC interface.

Do a search for varaible gain amplifier IC and there are a slew of them. You can build a detector that outputs a voltage based on the peak levels and use it to control gain. You just need to decide on the attack and decay times.

See http://www.ti.com/lit/ds/sbos395c/sbos395c.pdf

 

[petterg]

I'm having an issue with the 555's. The issue is that the timer starts when trigger goes low, even when reset is low. The result is that if reset goes high before the time runs out, the output goes high. Then problem also occurs if reset is high while trigger goes low, then when reset goes low output goes low, but if reset goes high before the timeout initiated by the trigger before reset, the output will again go high until timeout.

Is there a way to make reset include the discharge and not allow retrigger until next trigger edge?
With that issues solved, I think the oneshot approach will work.

Edit:
Alternatively the timer needs to be retriggered as long as the trigger input is lower than trigger threshold.

Reason is that pulse width may be long when input is strong, and timeout that is more than 50% of a cycle may cause other problems. Timer at 130-140us will work when cycle is exact 200us. Anything outside those 10us will fail. As this is supposed to work in the real world I have to account for some variance. A timer window of 10us is to small. By solving the retrigger, or reset including discharge (or preferably both) the timerrange may be in the range 70-140us. That will be a lot safer.

 

[meBigGuy]

Try a 74121 or 74123 style one shot.

The 555 is hard to use that way.

 

[jim hardy]

Your description of 555 behavior doesn't sound right. Is this a real one or a simulated one?

Tie RESET high.
Make sure you have bypass capacitors across supply, and on CTRL pin.

Tie TRIG and THRESH together, call them INPUT.
Check that it works like a simple inverter: INPUT LOW = Out(and Discharge) HIGH

 

[petterg]

I read about 74121 and 74123. If I got it right, they retrigger on new trigger edge only, they don't retrigger (continuously trigger) while the input is held at trigger level?

How long does the reset need to be held to make sure it reminds in reset state after reset signal is released? I can't find any such information in the documentation.

 

[petterg]

Your description of 555 behavior doesn't sound right. Is this a real one or a simulated one?

Tie RESET high.
Make sure you have bypass capacitors across supply, and on CTRL pin.

Tie TRIG and THRESH together, call them INPUT.
Check that it works like a simple inverter: INPUT LOW = Out(and Discharge) HIGH

It's simulation. I'm not building any real circuit before I've got it working in simulation. Datasheet doesn't say anything about how long the reset must be held low to reset. Simulation indicates that it must be held for whatever time is left of the timeout.

Simulation with TRG connected to THR behaves like you say. Also, if INPUT is low, output follows RST.
Problem is (I think) that DIS doesn't lead any current as long as TRG is low, no matter the position
of RST. To make it work there would need to be some sort of external discharge that is triggered when RST goes low. A transistor to short the timing capacitor has some effect, but it doesn't fully discharge. The other option would be a circuit to rapidly charge the capacitor (above THR) when RST is low.

 

[meBigGuy]

123, 423, etc are retriggerable if that's what you want.

The reset pulse leaves it reset until the next active edge. The spec is right there. 5ns for a 123.
https://www.fairchildsemi.com/ds/74/74VHC123A.pdf

Search for retriggerable monostable or just monostable. There are a ton of parts.

They are mostly edge triggered, as opposed to level triggered. SO, after a reset you need an active edge to trigger again.

 

[jim hardy]

How long does the reset need to be held...

a microsecond should be more than enough

Delay time reset to output is 0.47μs typical. Minimum reset pulse width must be 0.3μs, typical.

http://www.ti.com/lit/ds/symlink/lm555.pdf page 12

 

[NascentOxygen]

I don't know whether this is relevant here, but I'll mention it. When the topic of 555s comes up, I point out that not all 555s behave the same. So long as you stay within the documented uses and the configurations in the application notes, there is no observed difference. But if you start changing things, inventing new arrangements for trigger & threshold, the differences between manufacturers can become apparent.

 

[petterg]

I found this notice in the datasheet for NE555
http://pdf1.alldatasheet.com/datash...3_85UORlHDyRHOIpa/1XXyxeocTlLM+/datasheet.pdf

Applying a negative pulse simultaneously
to the reset terminal (pin 4) and the trigger terminal
(pin 2) during the timing cycle discharges the externalcapacitorand
causes the cycle to start over.The
timing cycle now starts on the positive edge of the
reset pulse.

That is exactly what I experience. All thou it could be written more precise, that the timing cycle starts on negative edge of trigger, so what the notice say occur if reset is released before timeout. And it doesn't matter if the reset and trigger pulses come at the same time or with some delay. While reset is low output is low. While reset is high, output will be high within the timing period. If there is a negative pulse to reset fully within the timing period the output will go low while reset is low, and return to high after the reset pulse. Timing period will start on negative edge og trigger even while reset is low.

Is that behavior unique for NE555 as I don't see anything similar in lm555 datasheet.

Buying a lm555 that is not a ne555 may be a challenge...

 

[petterg]

123, 423, etc are retriggerable if that's what you want.

The reset pulse leaves it reset until the next active edge. The spec is right there. 5ns for a 123.
https://www.fairchildsemi.com/ds/74/74VHC123A.pdf

Search for retriggerable monostable or just monostable. There are a ton of parts.

They are mostly edge triggered, as opposed to level triggered. SO, after a reset you need an active edge to trigger again.

I kind of need level triggered. Or edge triggered output, level retriggered timer.
As I don't see anything similar to the notice quoted above, I can assume that behavior does not apply to 74123?

 

[petterg]

I kind of have a solution now. I'm sure it won't work in a real circuit thou. The chain of components is: buffer - gain x20 - gain x20 - gain x20 - differentiator - low pass filter - gain x10 / inverting gain x11 - 2x 555 - 2x 555.
What makes this work is that I amplify in several steps to keep the wave form better, and I amplify so much that clipping will occur even for the weakest signal. That made the needed timing for the 555's more stable.

The reason this will not work in a real circuit is that all the amplifications will cause even the tiniest noise to trigger the 555's.

 

[jim hardy]

...I amplify so much that clipping will occur even for the weakest signal...

That's a good technique. It is not uncommon to use two diodes in parallel, opposite directions for a feedback 'resistor' around an inverting opamp. That way you don't saturate the amplifier.
Plain diodes give you a ~ 1/2 volt signal, zeners give whatever you want and it can be made asymmetric that way..


It WILL work in real world. All you need do is remove high frequency noise and that low frequency bias before handing signal to clipper.

 

[meBigGuy]

The problem is if there is any inband noise (he has amplified so much the low signal is clipped). I think clipping before low pass filtering is a mistake. I think not using a comparator to feed the logic is also a mistake. But, that's just my opinion. It's easy to sit here and take pot shots.

 

[jim hardy]

Yes, wash the signal of noise then process it.

 

[petterg]

I got too optimistic. Positive pulses when offset is positive, and signal is strong, causes permanent high output form the amplifier. (Opposite when both are negative and strong.) Back to the same unsolved problems...

 

[meBigGuy]

Maybe it's time to think about an AGC. The AD8336 is a variable gain amplifier (there are others). Here is an app note: http://www.analog.com/static/imported-files/application_notes/AN_934.pdf that shows one implementation.

Here is an application note that talks about the gain control implementation in a TI CODEC chip. : http://www.ti.com/lit/an/snaa028a/snaa028a.pdf It's more of an example of AGC in a general way, although it would provide a nice digital ADC interface.

Do a search for varaible gain amplifier IC and there are a slew of them. You can build a detector that outputs a voltage based on the peak levels and use it to control gain. You just need to decide on the attack and decay times.

See http://www.ti.com/lit/ds/sbos395c/sbos395c.pdf

Repost

 

[petterg]

AGC is too complex. Using the IC's in the sample circuit will cost $230 for 4 circuits. A MPU with 4 analog inputs will cost $10. I'd rather go with the MPU then.

I would have gone the MPU-way long time ago, it's just that I can't believe that removing something that is so close to a dc cold be this hard.

I would guess signals in wifi, gsm and other digital wireless communication also would need to filter pulse signals. How is it solved there?

 

[meBigGuy]

Whatever. A VCA820 is $6. And figure 83 shows an implementation with 2 opamps. I'm not sure why you think this is about "filtering pulse signals". It isn't. It's about a high pass filter, proper gain control, and a window comparator.

As for an MPU
You will need somthing like a 14 bit converter and need to consider the cpu cycles needed to implement your processing. I'd recommend high pass filtering before the adc. I'd implement it in C or MATLAB or something first so I could determine the processing requirements and what amount of analog pre-processing I needed before buying a processor. Make sure your sample rate is enough to get 4 or 5 samples per pulse.

Digital wireless uses A/D converters and dedicated dsp processing. They also have analog AGC and analog I/F filtering.

 

[petterg]

I calculated AGC cost for the sample at analog.com. It didn't hit me that TI would be that much cheaper.

I think the MPU code will be simpler than most digital filtering as all it needs to do is to keep track of pulse direction. Basically it must keep track of median voltage for the last 50(?)ms and the average voltage for the last 20us. If the short average is significantly higher than the median there is a positive pulse. If it's significantly lower there's a negative pulse. If no pulse is registered for the last 5ms, signal is lost.
Input must be amplified so that max expected offset is in the range +/-1.7V. That would make the strongest pulse +/-8.5V (clipping to 2.5V) and weakest +/-0.017V. That makes 1024 levels (10bit) for +/-2.5V sufficient.

Anyhow, I got home last night and woke up with a clear mind, which resulted in a retriggerable 555 circuit which seems to work. That makes the differentiator approach come back to life. "Seems" because I can't test it with the rest of the circuit. Turns out that LT spice fail to simulate 2x555 + 6 opamps. 6 opamps + 1 555 = OK. 4 opamps + 2 555 = OK. Once there is one device too much in the sketch - it doesn't even need to be connected to any signal, or the 555's trigger can be connected to V+, the simulation goes on for ever.

 

[meBigGuy]

There are lots of agc methods, variable amplifier chips and ways to skin that cat. All receivers have AGC. All decoders normalize amplitudes to some extent. I just looked for a few minutes and found the TI chip. It is way more high performance that what you need (150MHz if I remember correctly). There are probably cheaper solutions also.

As for your MPU solution, you can do the same thing by filtering for a comparator reference level (a window comparator). As I said, " It's about a high pass filter, proper gain control, and a window comparator."

 

[jim hardy]

You seem to take bigger mental steps than I do. (That's my weakness, not yours)

I would have to get my filters working individually with just resistors and capacitors before adding the opamps.

Opamps let's you cascade them without worry about one loading down the one before it.
But the corner frequencies of your individual filters will clean up the hf noise and block the lf, then you can differentiate and limit. You can get those working one at a time to produce desired function without complication of opamps.

Reason I suggest this is I don't understand your DC offsets. Resistors and capacitors don't tend to add offsets.
When you have found frequencies that work you can sharpen slopes by sallen-key or multiple feedback opamp filter topology.

This should be simple - bandpass, differentiate, limit(clip), count.

But I am probably days behind you.

General rule - when things look confusing, back up and simplify them

good luck and keep on experimenting.

old jim

 

[meBigGuy]

The problem with differentiation in this problem is that it detects both edges, doesn't it? I never got the need for that part of the solution. Seems like it just creates noise. A positive pulse has positive and negative edges. A negative pulse has positive and negative edges. What am I missing?

 

[petterg]

The problem with differentiation in this problem is that it detects both edges, doesn't it? I never got the need for that part of the solution. Seems like it just creates noise. A positive pulse has positive and negative edges. A negative pulse has positive and negative edges. What am I missing?

A positive pulse give a negative pulse, then positive pulse from the differentiator. A negative pulse turns the result the other way around. Thats perfect for triggering a pair of oneshots, one triggered on negative, one triggered on positive, and make sure output from one block the trigger of the other. Hence if the negative pulse comes first, only the negative triggered oneshot will be triggered. I've solved this by having output from one pull the reset on the other. While writing this I realized it would probably be better to stop the trigger signal before it reaches the oneshot input - in particular after I got the retrigger working.

 

[petterg]

You seem to take bigger mental steps than I do. (That's my weakness, not yours)

I would have to get my filters working individually with just resistors and capacitors before adding the opamps.

I'm thinking filters are dependent on the resistance to ground. Hence dependent on the load. The difference between us is that I have no clue what I'm doing. (You have some clue of what I'm doing.) I'll try your way...
[/QUOTE]

 

[petterg]

There are lots of agc methods, variable amplifier chips and ways to skin that cat. All receivers have AGC. All decoders normalize amplitudes to some extent. I just looked for a few minutes and found the TI chip. It is way more high performance that what you need (150MHz if I remember correctly). There are probably cheaper solutions also.

As for your MPU solution, you can do the same thing by filtering for a comparator reference level (a window comparator). As I said, " It's about a high pass filter, proper gain control, and a window comparator."

Use of a comparator requires high pass and gain control to work perfectly. Highpass has not been working so far. I'll give high pass another try.
Comparator would also work if Vref could be dynamic set to the level between pulses = lowpass. But even low pass has not worked out yet. (Thats the idea described in the initial post.)

 

[jim hardy]

The problem with differentiation in this problem is that it detects both edges, doesn't it? I never got the need for that part of the solution. Seems like it just creates noise. A positive pulse has positive and negative edges. A negative pulse has positive and negative edges. What am I missing?

My thought was this:

Thought experiment-
Amplify, filter and limit(clip).
Differentiate.
Ignore negative edges.
Immediately after a positive edge, look at the level of the clipped signal incoming to differentiator.
If that signal is high, then this pulse is a positive one that hasn't expired yet.
If that signal is low, then that pulse was a negative one that has just expired.

Might an edge triggered D flip-flop with clipped pulse for data and differentiated one for clock do it ?

It's immaterial which edge you use, the key is what follows an edge of given direction(up or down) tells you whether the transition was toward or away from zero.
Draw it out on a napkin.

jim

 

[jim hardy]

I'm thinking filters are dependent on the resistance to ground. Hence dependent on the load.

very much so. When you do voltage divider you have to include the load.

With un-amplified r-c filters make the downstream stage Z >10X the one feeding it.

old jim

 

[petterg]

I think I'm about to see what happens with the highpass filter (first order):
When tuned to low cutoff frequency (-3dB at 30Hz) it tries to center the output so that average voltage = 0. With a positive square wave, 25% duty cycle, the baseline is pulled down almost 25% of the pulse voltage. So a input pulse from 0mV to 100mv makes a output from -22mV to 77mV.

The higher I set the cut off frequency, the less square is the output pulse. At 1500Hz output show a starting ripple. At 3600Hz the output pulse looks more like the differentiator output. Anything above 5000Hz result in both positive and negative pulse. My goal was to keep the pulse shape, hence I made the filter with extreme low cut off frequency. That was probably the cause of what looked like dc made by highpass.

For the above test pulse was 50us on, 150us off. That equals 5kHz cycle. Tested with square wave generator, not my circuit.

For triangle pulse the pulse shape is kept a lot better, but the "flat" area between goes down half a pulse amplitude.

I guess the differentiator can double as highpass, and not worry about that part any more.


Lowpass (first order) keeps the pulse shape while cutoff is higher than 30kHz.

 

[jim hardy]

When tuned to low cutoff frequency (-3dB at 30Hz) it tries to center the output so that average voltage = 0.

sure, it has to.
High pass can't pass on the DC , so it'll have zero average output.
If its time constant is short compared with your pulse width you'll see the pulse edges as spikes of opposite polarity. That's differentiation.
Longer its time constant, the more your output will look like the input but centered about zero.

I still don't know what your input looks like. Does it really have 25% duty cycle?

but I suspect you're making good strides here by experimenting with time constants in your filters.
Keep at it until it becomes intuitive.
A high pass that's real slow compared to your pulse width should just move you to a zero centered wave, ie block that low frequency sinewave.
A low pass that's fast compared to your pulse width should remove higher frequency noise.
A differentiator can be a simple RC high pass that's got a time constant just a few(maybe 5- 10)% of your pulse width.

Have fun !

Even at my age it's still fun to learn...
at Goodwill this afternoon I found an antique General Radio 650 impedance bridge and bought it just to learn how the guys in 1930's made precision measurements of inductance and capacitance.
Found instruction manual online, looks very cool !
I should learn some really good basics from it.

picture courtesy this guy: http://www.prc68.com/I/GR650A.shtml


old jim

 

[petterg]

Seems like the combination of differentiator and level retriggered 555 is an excellent filter!

The attached graphics shows the input in red. That is a signal of negative pulses of amplitude 2.3mV with an offset of +0.4mV, added with quite a bit of random noise. The green is the (inverted) signal to trigger one of the 555's, devided by 100 to scale somewhat similar to the input.
The negative pulses are correctly detected, with two false spikes. As the 555 starts the timer when the trigger signal is lost, it's output won't be affected by the spikes. The pair of 555's will (in theory) be triggered by the level that lasts longest - in other words not the pulses, but the flat area between.

I have no clue how much noise there will be around the circuit. Here I just added so much that I was sure I could not tell anything about the input signal from watching the input+noise.

What fails is to leave both 555's unactive when there is no signal (including no noise). Maybe there's a need for separate circuit to detect "no signal"?

 

[petterg]

I still don't know what your input looks like. Does it really have 25% duty cycle?

Input is the derivation of the sawtooth generator you helped with before this thread, including a massive loss. What decides the duty cycle is the rise- / fall time factor of the sawtooth. It seems to be possible to push it to a better factor with a 5ohm resistor in series with the output, but my resistors (10x 47ohm i parallel) burned within seconds, so I need to wait for a delivery of some 50w resistors to really know if it will improve or not.

but I suspect you're making good strides here by experimenting with time constants in your filters.
Keep at it until it becomes intuitive.

By then I'll be far past your age ;)

A high pass that's real slow compared to your pulse width should just move you to a zero centered wave, ie block that low frequency sinewave.
A low pass that's fast compared to your pulse width should remove higher frequency noise.
A differentiator can be a simple RC high pass that's got a time constant just a few(maybe 5- 10)% of your pulse width.

Sounds like something similar to what I found.

an antique General Radio 650 impedance bridge

Looks like a nice toy!

 

[petterg]

Maybe there's a need for separate circuit to detect "no signal"?

Is there a trick to stop signals less than a certain level from Vref from pulling the opamp in any direction? (Kind of opposite of putting two diodes between the opamp input.)

 

[jim hardy]

Maybe there's a need for separate circuit to detect "no signal"? ...

I've seen that trick in telephony IC's.

Is there a trick to stop signals less than a certain level from Vref from pulling the opamp in any direction? (Kind of opposite of putting two diodes between the opamp input.)

A switch across a feedback resistor to drive gain to zero will do it. CMOS analog switch works okay, but big-guy is probably more fluent than I am as to current parts and technique.
hard part is deciding what's zero signal. Quiet differentiator output ?

Thanks for that picture of input - wow if you're pulling a signal out of that mess you are doing quite well. Impressive.

Is your impulse string regular enough you could phase-lock to it? In other words does input have a reasonably stable frequency? Do a quick read on 'synchronous demodulation', which somebody mentioned earlier. AD630 I think is the industry workhorse chip for that. LM567 is sometimes handy - it gives you a logic level output when it sees input in its frequency range, and is real simple to use.

 

[petterg]

I think I'm too dumb to see how a PLL would be useful here (or how to hook it up in a useful way).

Drive feedback resistance to 0, wouldn't that make a voltage follower? A follower would then output the same error as input. That would make the need to do the same on each opamp. I was thinking more like pulling the input towards vgnd if it was close to vgnd. Maybe that won't be enough to keep output from the other opamps =vgnd?
(I don't know how to implement this thou)

 

[jim hardy]

...
Drive feedback resistance to 0, wouldn't that make a voltage follower? A follower would then output the same error as input. That would make the need to do the same on each opamp. I was thinking more like pulling the input towards vgnd if it was close to vgnd. Maybe that won't be enough to keep output from the other opamps =vgnd?
(I don't know how to implement this thou)

You're far from dumb and doing fine with filters and don't need the distraction of pll's right now. My bad.

Inverting opamp gain = Rfb/Rin, so Rfb=zero gives zero gain
Indeed for a noninverting follower minimum gain = 1.


A question well stated is half answered.
For just detecting inactivity ask yourself "What is condition of signal where I declare it not present?"

Are you familiar with National appnote AN-31, a handy collection of opamp circuits? http://www.ti.com/ww/en/bobpease/assets/AN-31.pdf

it dates back to around 1970 so a lot of the opamps are really old ones, feel free to insert modern ones.

old jim




old jim

 

[petterg]

When you mention pll, I'm sure it's a good idea. I'm just not capable (too dumb) to see it.

Also I forgot that gain can be <1 when inverting.

So a switch then, to make gain=0 when no signal is comming. Could the switch just be a pair of transistors? (One to open when positive signal level, one to open when negative signal level?) Or would one of the circuits on page 5 in AN-31 be better?

And wouldn't such a switch give a full new way to look at the circuit? One opamp has a switch that makes gain=0 when input level is negative, the other makes gain=0 when input level is positive. Wouldn't that make it posible to drop everything else in the circuit?

"What is condition of signal where I declare it not present?"

When it's so weak that pulses cannot be detected. Originally I was thinking of that as when the input, after amplification still did not have the level required to trigger the oneshots. With the approach of using clipping to an advantage that won't happen. Any tiny bit of noise will be enough to trigger, unless there is a strong enough signal to control that. Maybe the trigger level can be adjusted so that level near clipping is required to trigger, and adjust gain so that minimum signal is just enough to get past that level?