What Is the Limit Cycle in a Flip-Flop and Shift Register System?

[topgun08]

Homework Statement

For the system of Fig. 1, construct a complete state diagram showing all 16
states of the system. Your diagram should have 16 circles, numbered 0000
through 1111, connected with arrows showing which state each state goes to
after one tick of the clock. Interestingly, this system has a limit cycle: that is, no
matter which state it starts in, it ends up going repetitively through the same
sequence of states. Find the limit cycle.

[PLAIN]http://img135.imageshack.us/img135/9949/bahphaadm.jpg

http://img135.imageshack.us/img135/9949/bahphaadm.jpg

Homework Equations

none?

The Attempt at a Solution

I'm having a really hard time understanding these flip-flops. My book does not cover it in length. While I'm looking to complete this problem I am more interested in the technique to solving this type of problem over the actual answer.

I think that the clock starts at time 0, and all the Q's are in rest at 0, but what's the deal with that AND gate at the top?

Any help is appreciated. Thank you!

 

[jegues]

Homework Statement

For the system of Fig. 1, construct a complete state diagram showing all 16
states of the system. Your diagram should have 16 circles, numbered 0000
through 1111, connected with arrows showing which state each state goes to
after one tick of the clock. Interestingly, this system has a limit cycle: that is, no
matter which state it starts in, it ends up going repetitively through the same
sequence of states. Find the limit cycle.

[PLAIN]http://image.bayimg.com/bahphaadm.jpg

Homework Equations

none?

The Attempt at a Solution

I'm having a really hard time understanding these flip-flops. My book does not cover it in length. While I'm looking to complete this problem I am more interested in the technique to solving this type of problem over the actual answer.

I think that the clock starts at time 0, and all the Q's are in rest at 0, but what's the deal with that AND gate at the top?

Any help is appreciated. Thank you!

The figure in your post is not being displayed. Can you repost it?

 

[LCKurtz]

The way a D flip-flop works is that at each rising clock what is on the D input is transferred to the output: Q+ = D. The AND gate gives the feedback loop. In this case

D₁ = Q₁'Q₂'Q₃'

That tells you D₁ will only be 1 when Q₁, Q₂, and Q₃ are all 0. And since the Q outputs are connected directly to the D inputs of the next flip-flop, it is easy to see what the next state will be. If you start with the state

Q₁Q₂Q₃Q₄ = 0000

what will D1 be and what will the next state be?