What will be the next step after reaching the limit of Moore's Law?

[Pupil]

While there are various estimates to the year in which we will not be able to continue adding transistors to a given area on a silicon chip, the typical guess is between 2013 and 2018 [1]. Given that there will eventually be a limit to how small we can make the transistor (due to quantum effects), where will we go from there? I have heard of the possibility of making the chips larger and or layered. What other options are viable, and how will the previous two options (larger chips and more layers) affect the rate of growth of computing power? Will new solutions be able to continue the exponential growth rate described by Moore or not? I hope someone can relieve me of my ignorance regarding this matter, and perhaps send a few links my way for more information. Thanks.

[1] http://news.cnet.com/2100-1008-5112061.html

 

[Negatron]

If the limit is indeed atomic rather than subatomic then the estimate is somewhat correct, but far closer to 2018 than 2013.

Pitch/Gate length drops with a root of about 0.7 per full node reduction. So it's 32nm now, 22nm by 2011, then 16nm, ~11, ~8, ~5. 5nm gives you a distance of about 15-20 silicon atoms to work with, making each transistor consist of hundreds of atoms. This is believed plausible with lithographic technologies and silicon. 5 node reductions will take about 7-8 years.
Transistors other than silicon consisting of <20 atoms have been demonstrated. Lithography as we know it seems unfit for atomically precise manufacturing which will be necessary at that scale, but in principle it has been shown possible to construct such things. Processes 10 years from now may very well extended shrinkage for at least another few nodes.

When we do eventually hit the atomic limit, then the long road towards outward expansion with 3D circuits begins. This would make it possible to increase transistor count millions of times while negligibly increasing package size relative to a planar circuit.

Given a modern die size, it would be possible to ultimately increase transistor count a billion-fold over what we have today with atomic-scale processes. If it is possible by nature, given how consistent progress in integrated circuit manufacturing is, I think it should be assumed it is an achievable goal.

This could ultimately give at least ~Zettaflop performance on a single processor. After that there's really nowhere to go but out. I suspect transistor count will continue to drop as fast as always even after miniaturization limits have been hit. This is simply because manufacturing processes rather than material costs will continue to dominate the price for a very long time.

Whatever the ultimate limit is in transistor cost, it's so far away that when we finally hit it I doubt anyone will care. I'd be quite satisfied with yottaflop computer, that would make a rendering and physics engine as good as I could possibly care for.

Indeed, Moore's Law, if the rate persists, has decades of life left. Decades from now it may very well have decades more. Too early to say.

 

[edpell]

There is still the dimension of lower power to explore. See DARPA's SyNAPSE project that aims to produce a system that fits in less than 1 liter that has 10^12 synapses (cat level complexity). Current PC have about 10^9 transistors in the CPU, 10^11 bits in RAM and 10^13 bits on harddisk. But only a few bits are active/processed per clock cycle say 64bits every 0.5 nanoseconds. So about 10^11 bits processed per second versus a neural network that processes all (many?) of the synapses in parallel giving some thing like 10^14 synapse per second processed. A factor of 1000 more. We will see how successful DARPA is.

 

[digitalblggr]

I believe the next decade (and maybe couple more after that as well) is going to see further evolution of multi-core processing. Currently we have symmetric multi-core systems (dual cores, quad cores, etc ) available commercially. The next step is asymmetric multi-core systems and dynamic systems. Take a look at this article I wrote discussing these topics:

http://digitalblggr.blogspot.com/2010/01/on-parallelization.html


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www.digitalblggr.blogspot.com

 

[edpell]

There is still the dimension of lower power to explore. See DARPA's SyNAPSE project that aims to produce a system that fits in less than 1 liter that has 10^12 synapses (cat level complexity). Current PC have about 10^9 transistors in the CPU, 10^11 bits in RAM and 10^13 bits on harddisk. But only a few bits are active/processed per clock cycle say 64bits every 0.5 nanoseconds. So about 10^11 bits processed per second versus a neural network that processes all (many?) of the synapses in parallel giving some thing like 10^14 synapse per second processed. A factor of 1000 more. We will see how successful DARPA is.

That should be 10^14 synapses in 1 liter (not 10^12) sorry.

 

[edpell]

Currently CMOS transistors are small in the source to drain direction but they are two orders of magnitude larger in the other direction. That is gate length is 45nm but gate width is 4500nm. This is because a nm of gate width produces very little current many orders of magnitude of gate width are needed to produce enough current to make the wire switch quickly. If you are willing to live with slower circuits you can have 10 to 100 times more transistors in the same surface area. Legalistically speaking Moore's law talks about the number of transistors and says nothing about there speed.