rbj said:
"they" (some of your fellow IC designers) do use transmission line modeling for traces on PC boards and in high speed ICs.
Of course, transmission line modelling makes sense for PCB traces at gigahertz frequencies.
For a first approximation of the delay through a CMOS gate, you only need two numbers: the resistance of the conducting paths that connect the gate's output to ground or VDD, and the capacitance seen at the gate output. That RC delay totally, completely swamps any RC delay seen on reasonable pieces of interconnect metal. The typical on-resistance of a transistor is in the range of kilohms, and the typical gate and diffusion capacitances are of the order of tens of femtofarads. These are very, very large numbers compared to those of the metal.
Temperature does affect the carrier mobility in the silicon -- and thus the on-resistance of transistors, as Gokul pointed out -- and this is a much larger effect than that of the changing resistance of interconnect.
The truth is, digital logic design tools do use a "wire load model" which attempts to include R, C, and L, and R is certainly non-zero. (I should note that in all the technologies I'm familiar with, R is considered fixed, unchanging with temperature, by the EDA tools.) Unfortunately, wire load models are notoriously inaccurate, and, generally, the only way to really verify a very high-speed design is to do post-layout extraction. We're in an age where EDA companies are trying to model second-order effects from the very beginning of the design workflow, but are currently doing a pretty lousy job at it.
i guess not. you tell me, but the clock speeds of modern ICs (Ghz) is in the microwave region of the spectrum, why does bringing microwave frequency effects muddy the waters?
It's a little debatable that 1 GHz is really "microwave," or that you truly need microwave design techniques to accomplish such a design. Many people design (small) 1 GHz logic with standard EDA tools, which have no knowledge of microwave circuit behavior. Current technology nodes (like 0.18u CMOS) have toggle frequencies of tens of GHz.
i am pedantic (i'm a DSP alg guy and i'll leave the hardcore IC design to the hardcore IC designers) but i do read about stuff that is not DSP. i also remember my analog circuit theory pretty well and knew that the series resistance contributes to the expression of phase velocity or group velocity of a transmission line.
It does, and you're correct. It's just a negligible effect, so I left it out.
i didn't say the effect was measurable, only that it's in the math (and i think i can still show this "pedantically").
It's in the math. We both know that. I left it out, and you called me on it as if I didn't know what I was talking about. I took offense to that (my apologies) and just wanted to explain that the reason I left it out is because it's negligible.
but i thought that it was in the context of the question that the OP was asking. do supercooled devices run faster than they would at room temp (or warmer)?
Well, people who cool their processors actively then go on to overclock them. The resulting junction temperatures deep inside the die are probably not much different than they were to start with, so the chip is not operating with any less resistance, or propagating signals any more quickly. Cooling the chip actively just
enables higher clock frequencies by removing the waste heat more effectively.
- Warren