XAND Gate: Is it Real or Just a Rumor?

[yurtpoh]

I've been reading Code: The Hidden language of Computer Hardware and Software by Charles Petzold, and he described the 5 basic gates (AND, OR, NAND, NOR, & XOR) with extreme clarity. In the chapter about adding machines, he described that we needed a gate that relays only when it receives a 0 and 0, or a 1 and 1 ("coincidence gate"). This is the exact opposite of an XOR gate, which relays only when it receives a 1 and 0, or a 0 and 1. I was wondering why we don't call the former gate a XAND ("exclusive and") gate? It makes perfect sense to me. It will only relay when it receives a 0 AND 0, or a 1 AND 1. It's just an AND gate that also relays with two 0s, but whenever I google "XAND" people say that it's not the correct term. Why not?

and I'm sorry if this isn't in the right sub-forum, but I searched the forum for other logic gate threads and they all seemed to be located here.

 

[rootone]

Because it is exactly the opposite of an XOR gate, all you need to do is use an XOR gate, then flip the result so that 0 becomes 1 and 1 becomes 0.
That can be implemented as a single switching transistor.

 

[Averagesupernova]

Or you can invert one of the inputs of an XOR.

 

[yurtpoh]

wow, now it seems obvious lol. that makes sense. idk why i couldn't think of that. thanks!

 

[Baluncore]

I was wondering why we don't call the former gate a XAND ("exclusive and") gate? It makes perfect sense to me. It will only relay when it receives a 0 AND 0, or a 1 AND 1. It's just an AND gate that also relays with two 0s, but whenever I google "XAND" people say that it's not the correct term. Why not?

The name of the function is related to the state of the two input bits. “Exclusively bit A, OR exclusively bit B" makes sense.

An AND gate requires both inputs be high, there is no bit exclusivity about it.
An inverted EXOR gate can be called a coincidence gate, an equality gate or a comparator.

Notice that AND and OR gates can have multiple inputs. EXOR gates become poorly defined for more than one input. They become “only one” gates or “majority” gates.

 

[mfb]

Notice that AND and OR gates can have multiple inputs. EXOR gates become poorly defined for more than one input. They become “only one” gates or “majority” gates.

Or parity gates, which is the most natural extension I think. A XOR B XOR C XOR D XOR ... where the order of operation does not matter so I didn't add brackets. It is 1 if and only if an odd number of inputs is 1.

 

[meBigGuy]

It is called an XNOR

 

[Baluncore]

Or parity gates, which is the most natural extension I think.

The term "parity generator" refers to the situation where the odd/even count of set bits is generated using a chain or tree of XOR gates. The term “parity gate” is rare except in the discussion of parity generator construction. Although the term parity gate makes sense, it only makes sense to those who first understand parity generation.

 

[yurtpoh]

It is called an XNOR

Awesome, thanks. This definitely helps.

Some of the other posts kind of go over my head at the moment since I'm new to this stuff, but it's definitely interesting to read about.