Is Conservation of Energy or Charge Correct in Superconducting Digital Circuits?

[SeriousNoob]

Homework Statement

The fundamental concept of charge and energy governs CMOS digital circuits. Your company is excited about the possibility of a truly superconducting three terminal device (i.e. a MOS device with zero on-resistance) to make logic circuits. The argument is that such a device will be lossless and dissipate no energy. For instance, consider the possibility of a three-input dynamic AND gate shown below. All of the input switches are opened during the precharge cycle and the clock switch charges the first capacitor to Vdd. During the evaluation period, the clock switch opens and the charge from the first gate is distributed through the closed switches. A colleagues claims that the AND gate obeys conversation of energy. In other words, the initial energy stored on the first capacitor, $$E=\frac{1}{2}CV^2_{dd}$$, is distributed across the four capacitors when Q=1. Another colleague counters that instead conservation of charge holds. Who is correct?
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a) Consider conservation of energy. What is the final voltage at Q when A=B=C=1? Assume no threshold voltage for the switches.
$$\frac{1}{2}CV^2_{dd}=\frac{1}{2}(4C)V_{Q}^2$$
$$V_Q=\frac{V_{dd}}{2}$$
b)Now consider conservation of charge. What is the final voltage at Q when A=B=C=1?
$$CV_{dd}=4CV_{Q} \rightarrow V_Q=V_{dd}/4$$
c)What is the final energy in the conservation of charge case? How does this compare to the original energy in the system?
Energy from conservation of charge is 4 times less than energy from conservation of energy.

d)Which of your colleagues is correct? Does the superconducting switch allow dissipationless computation? Make a mathematical argument about why either conservation of charge or energy must be wrong.

Homework Equations

$$C=QV$$
$$E=\frac{1}{2}CV^2_{dd}$$

The Attempt at a Solution

d)
Can't seem to figure out why. I know if a PMOS was charging up a capacitor it takes
$$E=CV^2_{dd}$$ to charge a capacitor while the energy that is stored on the capacitor is $$E=\frac{1}{2}CV^2_{dd}$$ so half of the energy is lost to the PMOS.
I'm thinking the reason why one conservation is incorrect is due to something like this.

 

[willem2]

The problem here is that with no losses at all, you'll never get an equilibrium state, a loop has an inductance, so the charges will keep on moving between the capacitors, and the energy will move between the capacitors and the magnetic field, so most of the questions don't make sense.
If there really are no losses
a) there is no final voltage at Q
b) there is no final voltage at Q
c) the energy in the system is constant, but you must consider the magnetic field also.

 

[SeriousNoob]

Oh, I think the capacitors are supposed to be grounded.

 

[willem2]

Oh, I think the capacitors are supposed to be grounded.]

Why would that change anything?

 

[SeriousNoob]

You have 4 capacitors in parallel if ABC are HIGH so the doesn't the charge distribute?