65 nm technology is not a problem?

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The discussion centers on the advancements in semiconductor technology, particularly the transition to 65 nm manufacturing processes. Initial production plans for 65 nm technology indicate significant progress in chip manufacturing capabilities. The conversation highlights the historical context of scaling, referencing Moore's Law, which predicts an increase in the number of transistors on a chip every two years. While some experts claim that scaling has become challenging below 130 nm, the article suggests that the benefits of scaling have evolved, and not all advancements are reliant on size reduction. Concerns are raised about the fundamental limitations of materials and the implications of shrinking structures, particularly regarding the performance of MOSFETs at smaller scales, such as 45 nm. The dialogue emphasizes the complexities of nanofabrication and the need to address new challenges as technology progresses.
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Hi

Look here http://www.physorg.com/news52.htm

Seems that 65 nm technology is already not a problem if they plan to
begin the initial production from it!
How can that be?
 
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Computer science news on Phys.org
neutron said:
Hi

Look here http://www.physorg.com/news52.htm

Seems that 65 nm technology is already not a problem if they plan to
begin the initial production from it!
How can that be?

Why is it surprising to you? It's the next step along for computer chip manufacturers. It's a factor of 2 smaller than what they were doing a few years ago.

I did some 150 nm work more than 10 years ago. The techniques have gotten robust enough for commercial applications and progressed to smaller structures.
 
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Look here http://www.eetimes.com/semi/news/showArticle.jhtml?articleID=19502091
Some people (and this one from IBM) say scaling is dead below 130 nm.

And if you did 150 nm work more than 10 years ago then it would hardly apply to Moore's Low which says 2 times more devices on the chip every 2 years. We must be in 30 nm range at the moment!

And do you think we can shrink optics forever?

And what if MOSFET gate oxide becomes one monolayer of material?

That's why it surprising!
 
neutron said:
Look here http://www.eetimes.com/semi/news/showArticle.jhtml?articleID=19502091
Some people (and this one from IBM) say scaling is dead below 130 nm.

And if you did 150 nm work more than 10 years ago then it would hardly apply to Moore's Low which says 2 times more devices on the chip every 2 years. We must be in 30 nm range at the moment!

And do you think we can shrink optics forever?

And what if MOSFET gate oxide becomes one monolayer of material?

That's why it surprising!

The article says the benefits from scaling have changed, and not all progress comes from that now. It doesn't say you can't make some structures smaller, or that we've hit some limit in making things smaller at 90 nm.

Moore's law is an observation, nothing more. It's not a fundamental principle of nature or anything, and was was specific to the computer industry. Not all nanofabrication is computer-related. It's not all optics-limited, either.
 
Realize this, the smaller we go, the more we have to worry about other effects. Yes we will run into nonlinear effects in silicon and germanium which come about due to the size of the structure, i.e. quantum dots, etc...

The reason why we haven't made great strides in scaling below 130 nm is because of the optics of the probelm. It wasn't all to long ago when the blue and ultraviolet lasers were made available.
 
to Swansont

Well, I see you point. But you don't see mine.

Moore's low is an observation and not a fundamental nature law.

And you can make structures smaller. But why if they won't work?

And now I'm talking about things that WORK.

45 nm WORKING MOSFET is suprising for me, because I can see all FUNDAMENTAL limitations that prevent it be WORKING.

And 45 nm NON-WORKING MOSFET is NOT surprising for me. Reasons are the same.
 
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