Class A Amplifier Sinusoidal Input/Output Relation

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A Class A amplifier's output can indeed contain DC, fundamental, and second harmonic terms, contrary to the common belief that it only produces a sinusoidal output at the same frequency as the input. The derivation presented is correct, as it accounts for the non-linear behavior of the NMOS transistor in saturation, which leads to higher harmonics due to varying small-signal transconductance. Additional circuit elements like DC biasing and blocking capacitors can help mitigate the DC offset and harmonics, leaving primarily the fundamental frequency. The definition of Class A amplifiers is somewhat flexible, primarily distinguishing them from other amplifier classes. Understanding these nuances is crucial for accurate amplifier design and analysis.
cgiustini
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My simplistic derivation below for a Class A amplifier shows that an AC signal at the input produces DC, fundamental, and 2nd harmonic terms at the output. This seems to contradict most the information I have found on this - which just states that the output is sinusoidal and of the same frequency as the input without any explanation of the details. Can anyone explain why my derivation below is wrong? Is the output of an ideal Class A amplifier always a DC-shifted sinusoid that has the same frequency as the input? Or does it have other terms as shown below?

In the case of electronic amplifiers using NMOS transistors to amplify AC signals, the AC input x(t) is applied to the gate-to-source voltage. Assuming we are using a Class A amplifier, the voltage at the gate is some Vgs(t) = Vbias + x(t) with Vbias and x(t) such that Vgs(t) never goes below the transistor operating threshold Vt. We also always assume that the transistor is operating in the saturation region.

Using an external circuit to the transistor (see attached diagram), we can say that the drain voltage is equal to: Vds(t) = Vdd - Id(t)*RL, where Vdd is power supply, Id(t) is transistor drain to source current, and RL is load resistance. Because the transistor is always assumed to be in saturation, we can write Id(t) = k*(Vgs-Vt)^2 (where k is some proportionality constant). Thus, plugging this equation into the equation for Vds yields: Vds(t) = Vdd - k*(Vgs-Vt)^2*RL = k*RL * (Vbias - x(t) - Vt)^2 = k*RL*(x(t)^2 + (Vbias-Vt)^2 + 2*(Vbias-Vt)*x(t)). Using this model and assuming that x(t) represents a sinusoid, the output Vds(t) contains DC, fundamental, and 2nd harmonic terms for x(t) --> is this interpretation correct?
 

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Your derivation is actually correct for schematic depicted. It took additional circuit elements (by applying input DC bias and by adding DC blocking capacitor at output) to reduce 2nd harmonic and DC offset at output, thus leaving only fundamental frequency
 
cgiustini said:
Because the transistor is always assumed to be in saturation,
  • A MOS transistor does not go into saturation
  • If you are thinking of a junction transistor, the definition of saturation is that "the collector current is no longer dependent on the base current" - which means that it cannot be used as an amplifier.
 
I haven't checked all your equations but the first one is OK so I'd say you are on the right track.

The definition of a class A amplifier is somewhat loose: it's used mainly to differentiate with other modes of oeration. Basically i think it implies continuous output with input. This compares with other classes of amplifiers. For example, a class D amplifier is a pulse-width-modulated amplifier. I would not spend too much time memorizing what the different classes of amplifiers do and their respective properties.

Your amplifier is highly non-linear due to small-signal transconductance (di/dVgs) varying nonlinearly with Vgs. So yes you can expect higher harmonics, in fact higher than second since the formula you used is itself an approximation.

BTW you were correct in stating that your circuit operates in the saturation mode. This mode is defined by Vgs - VT >0, Vds > Vgs - VT. It it isn no way analogous to saturation of a BJT transistor.
 
I am trying to understand how transferring electric from the powerplant to my house is more effective using high voltage. The suggested explanation that the current is equal to the power supply divided by the voltage, and hence higher voltage leads to lower current and as a result to a lower power loss on the conductives is very confusing me. I know that the current is determined by the voltage and the resistance, and not by a power capability - which defines a limit to the allowable...

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