Engineering Combinational Logic Circuits using Logic Gates

[Fatima Hasan]

Homework Statement

Design a circuit with four inputs and two outputs which realizes the functions :
f₁ = Σm(0,2,4,5,6,14)
f₂ = Σm(0,1,4,6,12,14)

Homework Equations

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The Attempt at a Solution

Here's my work :

2 levels (NAND / OR )
10 gates
17 gate inputs

2 levels ( NAND / OR )
7 gates
11 gate inputs

Could someone check my answer please ?

 

[lewando]

Your equations for f1 and f2 look right, but your gate diagram does not (hint: look at the input selectors).

[Edit] I take it back. Diagram looks good. I was thinking that those selectors were input polarity selectors. They now appear to me as input state selectors.