I'm trying to create a full adder using one 3-to-8 decoder and some nand gates. As of now I know I will have X, Y, and C_in as my inputs. I am having trouble with figuring out what the 8 outputs of the decoder should be, so I am unsure about where and how to use the nand gates. Anyone able to give me a nudge in the right direction?
so you want to create a full adder for the three bits? Or is one of the bits a carry? edit: guessing C is carry. Draw out the map for X, Y C, and L0 through L7 first Then draw out the map for X, Y and C. Then you can correspond the values e.g. L1 would correspond to an output of 1 for the sum and 0 for the carry. L7 corresponds to bit x added to bit y added to the carry which the output should be sum of one carry one So you feed sum into a NAND and get the COMPLEMENT of what you want since you will eventually feed it into another NAND gate ditto for c should get you started might be different from what I say just off the top of my head.
Scratch that last thing about getting the compliment anyway just realize that for input L0 you want an output of s=0 c=0 L1 s=1 c=0 L2 s=1 c=0 L3 s=0 c=1 etc then minimize the function I missed this So a 3 - 8 decoder has 3 inputs and 8 outputs. each output corresponds to a combination of the input. so there are 2^3 combinations of x,y,c there will be one and only one output for each combination. input of 000 turns on the L0 line 001 turns on the L1 line 010 L2 011 L3 100 L4 etc
Could you be a little clearer with the first part about the maps? Should I have a K-map for inputs X Y Cin and output Cout, and then one for X Y Cin and output Sum? What exactly will my 8 outputs from the decoder be?
If you are selecting decoder outputs with a nand gate, I have to assume the selected output of your decoder is active low. Adding X, Y and carry_in is really just adding three bits. X_out of your full adder will be high whenever you have an odd number of input ones. So for this you need a 4 input nand gate fed with the decoder outputs generated from these inputs.
Okay, that makes sense. I guess my big problem is the gates. Do I need to add these 8 outputs a certain way to yield one sum and one carry out?
Make an input output chart of L0-L7 and Sum Carry Remember that one and only one output will be active at a time no matter what combination of X Y C you choose. Also the answer is yes you do. You need to turn 1 signal into 2 depending on the input and desired output.
I'm sorry you are helping a lot but I am very slow with this stuff. I am not sure how to make a K-map with s and c_out with the Li's since each output of the decoder L has three components. Eh.
no doesn't need to be a kmap no need to reduce it yet Code (Text): Input intermediate output x | y | c | L0 | L1 | L2 | L3 | L4 | L5 | L6 | L7 | Sum | Carry 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 1 0 0 1 0 0 0 1 0 0 0 0 0 1 0 etc You know the basic design of an adder right? edit "quote" this to make it easier to read the spacing is off
oh so its just the NANDs throwing you off? You can make any function using NAND using boolean algerbra. so, if you want to make OR Code (Text): a --- a` NAND ---- -------------- !(a`b`) apply DeMorgans a+b a----- NAND------------------------------ | b`---- b` | NAND----------------| b----- quote this as well
Ok so now I have the graph and the decoder with the outputs that yield a sum of 1 hooked up with a nand gate. I understand how to use the gates to make other gates. What is confusing me is just taking the particular outputs of the decoder that have sums or whatever and translating that using nand gates. The whole idea of using a decoder for this confuses me since I know how to do it with just gates... the function and relationship between the decoder and the gates is what is throwing me off.
Alright so what you want to do is L -> Sum, Carry L0 -> 0 0 but since you can only use NAND L0 -> 0 0 L1 -> 1 0 L2 -> 1 0 etc Okay I don't know if you can actually do this but I don't see why you couldn't (someone confirm?) write out the equation for this function in sums of products form and partially apply DeMorgan's i.e. ABC + CDF applying DeMorgan's we get !(ABC) * !(CDF) look familiar?
No you are helping a lot. But I am most clueless on how to use these gates after the decoder to complete the circuit.
OK OK this is looking familiar. I will need to formulate an equations that relates L to S and C, and then implement this with the outputs from the decoder? Will I treat L1 as 001, or just as L1? Is this just notation at this point? And also, am I just adding up the sums that go to 1? Also, should this k-map have the first inputs X and Y Cin also?
Since you are using the decoder outputs you want to relate the Ls to Cout and Sum yes sums of products does add to 1
Alright I was wrong, you definitely can't partially apply Dmorgans thinking it over. Sorry I am really tired and am making a lot of mistakes :( but finding POS is a way to go. If you can find that, you can simply make equivalent OR and AND gates that are needed.
Also for so many variables you probably would like to use Quine-McClusky's or a computer. http://www-home.fh-konstanz.de/~voland/QMC/index.html