I have been given the following components to design a 4 to 16 decoder: I. One 3 to 8 decoder (with enable) II. Two 2 to 4 decoder (with enable) III. Two NOT gates IV. Two AND gates I just don't understand where the AND, NOT, and enables go into. I have attached two files One with the 3 to 8 decoder, Two 2 to 4 decoder w/o the NOT gates and AND gates. Another one of me showing how i connected TWO 2 to 4 decoders to design a 3 to 8 decoder Can anyone help me?