Design a Buck Converter with Low Power Losses

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Discussion Overview

The discussion revolves around designing a buck converter with a focus on minimizing power losses. Participants explore various design strategies, component choices, and trade-offs related to efficiency, including the use of synchronous rectification and the impact of switching frequency.

Discussion Character

  • Exploratory
  • Technical explanation
  • Debate/contested
  • Mathematical reasoning

Main Points Raised

  • Some participants inquire about the specific input and output voltages and currents to tailor the design approach.
  • One suggestion is to replace the diode with a MOSFET to reduce losses.
  • Another participant mentions that using a low switching frequency can minimize losses, albeit at the cost of larger inductors and capacitors.
  • Discussion includes the importance of inductor DCR and MOSFET Rds(on) in reducing resistive losses.
  • There is a mention that for higher output voltages, the diode drop becomes a smaller percentage of the overall energy efficiency, making synchronous rectification more beneficial at lower output voltages.
  • Participants discuss the trade-offs between frequency, core losses, and the need for careful PCB layout to minimize resistive losses.
  • One participant raises a question about how larger inductors and capacitors can increase efficiency, prompting further exploration of the relationship between frequency and component size.
  • Concerns are expressed regarding the effects of frequency on copper losses and skin effect, with inquiries about the potential benefits of using litz wire or copper tape.

Areas of Agreement / Disagreement

Participants generally agree on the importance of minimizing resistive losses and the role of component selection in achieving efficiency. However, there are competing views on the effectiveness of different strategies, such as the use of synchronous rectifiers versus diodes, and the implications of switching frequency on overall design.

Contextual Notes

Participants highlight various assumptions regarding component behavior and design constraints, such as the need for careful consideration of PCB layout and the impact of frequency on losses. The discussion remains open-ended with unresolved mathematical relationships and design choices.

Who May Find This Useful

Individuals interested in power electronics design, specifically those focused on buck converters and efficiency optimization strategies.

zafranax
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how to design a buck converter that will have less power losses
 
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zafranax said:
how to design a buck converter that will have less power losses

This is a rather broad and general question, as posed. What sort of voltages and currents (input and output) are you looking at? Are you trying to design your own, or are you using an IC to facilitate this?
 
Replace the diode with a MOSFET.
 
In addition to Phrak's suggested synchronous rectifier, another way to minimize loss would be to use a low switching frequency (which means larger inductor/capacitor). Other things to look for is the inductor DCR, mosfet Rds(on) and if you don't want the extra complexity with the synchronous rectifier, use a low-drop schottky. Of course, once you start counting mΩ's in the mosfet and inductor DCR, your actual PCB layout will need to be done with care (e.g., wide short tracks, etc).
 
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gnurf, how will larger inductor/capacitor increase efficiency.
Also, synchronous rectifier helps when output voltage is less (3.3V, 5V). If the output voltage is large(say 24V), the diode(if used instead of synchronous rectifiers) drop is only a small percent of your output voltage.
 
gnurf has hit on all the major points. Anyplace you can think of with resistive loss is something to look at. You are right, the higher the voltages the less effect a diode drop has on overall energy efficiency.

Low ESR capacitors are good to have. It's good to select the right transformer core material.

The lower the frequency the less crossover (vi-product) in the switching transistors, less transformer loss and less capacitor loss.

Cut the frequency in half and the current in and out of the capacitor occurs half as often. So as gnurf suggested, the capacitor has to double in capacitance to have the same output ripple.

For the transformer you have both core and copper losses. For half the frequency you get about half the core loss, but you now need a bigger core to add more windings to keep the peak flux density the same. In opposition, core losses are proportional to the volume of core material.

Selecting the best core geometry, size and material meeting price and efficiency constraints can be a consuming process. If volume price is not a constraint for a one-off (you just want to make one), this greatly simplifies things.

Also, core size effects winding window area (more area is better) but also the length of a wind (longer wind length = not better).

Copper losses: Doubling the frequency means the wind count goes down by a factor of 1/sqrt(2) to obtain the same peak flux [Is my factor correct??], decreasing copper loss. But increasing frequency also means increased skin effect which offsets some of the gain in energy efficiency.

I'm not familiar how much litz wire or copper tape can help with reducing skin effect losses.
 
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