Design with D-Type Latch

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Discussion Overview

The discussion revolves around the design of a control system using an octal D-type transparent latch to manage 8 microphones on a first-come-first-serve basis. Participants explore how to ensure that only one microphone can be active at a time, addressing both the logic required and potential issues such as button presses and ties.

Discussion Character

  • Technical explanation
  • Debate/contested
  • Conceptual clarification

Main Points Raised

  • One participant seeks guidance on how to use the latch to control the microphones without allowing multiple inputs to activate simultaneously.
  • Another participant suggests making the latches opaque when one mic is keyed to prevent others from taking control.
  • Concerns are raised about the possibility of multiple microphones being keyed at once, which contradicts the desired functionality.
  • A participant proposes using AND and OR gates to manage the logic, arguing that a synchronous circuit may not be necessary.
  • Discussion includes the potential for ties in button presses and the implications of switch bounce, with some advocating for synchronization while others suggest it may not be needed.
  • One participant suggests using an XOR gate and a delay for the latch enable input, while another counters that delays and XORs are unnecessary and proposes a simpler logic solution involving an AND gate.

Areas of Agreement / Disagreement

Participants express differing views on whether a synchronous circuit is required and how to handle potential ties in button presses. There is no consensus on the best approach, with multiple competing ideas presented.

Contextual Notes

Some participants highlight the importance of considering switch bounce and the timing of button presses, suggesting that these factors could complicate the design. The discussion remains focused on the use of latches and does not resolve the technical challenges presented.

kal22
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How would I use an octal d-type transparent latch along with other logic to control 8 mics on a first-come-first-serve basis? There are 8 input mics and 1 output mic. Only 1 input mic can be used at a time. If a 2nd mic is keyed, I do not want it to take away control from the 1st mic in use.
 
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Is this a homework assignment?

Well, the latches only transmit their inputs when they're transparent. So, when one mic is keyed, you make the latches opaque...

- Warren
 
It's a small part of a project.

I need to trip the relay of the 1st mic that's keyed and make sure that the other ones don't activate as long as 1st still has control of the output.

I'm not sure how to get started. Any ideas?
 
Didn't I just give you the answer?

- Warren
 
Well, according to the function table for the 74HCT573 octal d-type transparent latch, whenever the latch enable input goes high, the Q outputs will follow the D inputs.

For this project, a D input will be high if that particular mic has been keyed. More than one mic can be keyed at a time, thus, more than 1 of the 8 Q outputs can be high. A high output signal will trip a relay that will activate a mic. So, more than one mic can activate at a time - which is what I don't want. I need to add logic gates somewhere.

I don't if what you've answered is what I was looking for. Maybe it is, but I just need more clarity. Thank you for your help.
 
Do you know what a synchronizer circuit is, and what it is used for? You need to synchronize your asynchronous switch inputs into a clocked circuit, and have the clocked circuit arbitrate the relay enable signals.

Since this is so close to homework/coursework, you need to show us your work and progress before we can give you much more in the way of hints.
 
Actually, berkeman, I don't believe this needs to be a synchronous circuit at all. All you need are some AND and OR gates (mostly ORs).

- Warren
 
chroot said:
Actually, berkeman, I don't believe this needs to be a synchronous circuit at all. All you need are some AND and OR gates (mostly ORs).

- Warren

But what about ties?
 
berkeman said:
But what about ties?

In practice, ties will never happen. We're talking about people pushing buttons, aren't we?

The probability of two people pressing two buttons within a nanosecond or two of each other is about the same probability of a three-stage synchronizer circuit becoming metastable. Fuhgetaboutit.

- Warren
 
  • #10
chroot said:
The probability of two people pressing two buttons within a nanosecond or two of each other is about the same probability of a three-stage synchronizer circuit becoming metastable. Fuhgetaboutit.

Valid point -- I guess I just like to synchronize everything. But, ask yourself, WWJD? (What Would Jeopardy Do?) I'll bet that their buttons go through synchronizers, and ties are resolved with a PR number generator... Gotta go check that out...
 
  • #11
Well, unbounced switches could lead to some interesting ties, especially if the switches bounce for anything more than a millisecond.

I firmly agree that the better solution (the "Jeopardy solution") would be to synchronize the inputs and use something like a priority encoder. But, the OP is instructed to use latches, and that smells like asynchronous logic to me.

- Warren
 
  • #12
yes, each mic has a push-to-talk button.

so far, what I've thought of is connecting an XOR gate to the latch enable input. i'd have the same 8 mic inputs going into the XOR gate as the ones going into the D inputs of the latch. i'd also have some kind of delay before the 8 D inputs, so that the latch enable input becomes high before more than 1 of the D inputs will become high.
 
  • #13
No need for any delays, nor any XORs. You just need some logic to "look at" the inputs on the left, and the output on the right.

The logic on the right produces a signal to turn the latches opaque as soon as a single button has been pressed and has propagated through the latches.

The logic on the left produces a signal to turn the latches transparent again as soon as all the buttons have been released.

The latches should be opaque only when the left side and right side both agree they should be opaque. This implies a single AND gate.

- Warren
 

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