Ring oscillator with three CMOS inverters shows DC line instead of oscillation

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Novice10
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Homework Statement


I'm required to design a simple ring oscillator... One with three stages of cascaded cmos inverters using pspice capture(student version)

Homework Equations

The Attempt at a Solution


I have simulated the circuit with a 5v supply but all i see is a dc line at 2.50v.has this got something to do with triggering the oscillator?.. Please help me. I'm completely new to this. [/B]
 
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At first, it would be very helpful (for us) to see your schematic.
Secondly - do you know the basic working principles of (a) a CMOS inverter (linear application) and (b) such a ring oscillator?
If yes - give a short summary.
 
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Should have done that in the first place.

Inverters and ring oscillator--yes i know the basics about them.But I've studied them all as digital circuits(using just gates).Pspice--i know next to nothing and all these codes with models of transistors just confuse me.

Basically,what i know of a ring oscillator--it is a circuit with only one stable operating point that is vin=vout=threshold of the inverter.Therefore,whenever there's a devviation from this the circuit starts oscillating and this goes on indefinitely because of the feedback.

One thing i don't get is how this initial deviation should be done--i found references to a single pulse,a part named initial conditions.I've tried them all but they don't work for me.
I'd really appreciate any help on this.just telling me what I've done wrong would be good enough.

Thanks.
 
1.) Your diagram cannot be evaluated. Are YOIU able to read it - as it appears here?
2.) Why does the ring oscillator oscillate? How is the frequency determined?
 
Novice10 said:
Basically,what i know of a ring oscillator--it is a circuit with only one stable operating point that is vin=vout=threshold of the inverter.Therefore,whenever there's a devviation from this the circuit starts oscillating and this goes on indefinitely because of the feedback.
I think you're supposed to use buffered inverters, where there is no possibility of stable DC operation.