Detect increasing or decreasing pot output

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hackhard
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I want to detect whether potentiometer output voltage is increasing or decreasing and convert this to a digital signal.
the circuit must be able to sense tiny voltage changes (order of 10mV) and with high speed.
all I am interested is if Vout increases or decreases not by how much
increasing V =high output
decreasing or stable V =low output
how can i achieve this?
 
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Easiest is convert the incoming voltage signal to digital as first operation . Then use some simple software to compare latest sample with previous sample . Usually best to do comparison using values averaged over several sequential samples rather than just spot values .

Any of the low cost single board computers available now with on board ADC could be used to do this .

Just for interest this was done in older times using an analog drift comparator . Using only op amps and RLC circuitry the short term average value of the test signal was compared with the rolling longer term average .
 
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Nidum said:
Any of the low cost single board computers available now with on board ADC could be used to do this .
is there any alternative to adc, i don't want to use a microcontroller.
will a data slicer opamp circuit do the job ?
 
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will this circuit work , how do i improve it

Circuit schematic of a potentiometer feeding an LM339N comparator: the pot wiper goes through a 100uF capacitor to the non-inverting input (pin 5), with a 220 resistor to +5V on the same node, and the inverting input (pin 4) is tied to the pot output; the comparator output (pin 2) goes to a 5.1k pull-up resistor to +10V.
 
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hackhard said:
will this circuit work , how do i improve it

Circuit schematic of a comparator using an LM339N op-amp (IC1A): a potentiometer on the left feeding a 100uF capacitor C1 and 220 resistor R1 to the inverting input, a 5.1k pull-up resistor R2 to +10V on the output, with +10V and +5V supply rails shown.
You should be using feedback in pretty much any opamp circuit. Look up "opamp differentiator" to find what you are looking for... :smile:
 
Your example circuit will oscillate and amplify any supply noise.

A differentiator circuit will detect the slew rate of the voltage from the pot. It will not detect slow changes of absolute voltage.
You need to use a window detector. https://en.wikipedia.org/wiki/Window_detector
The LM339 is a comparator with a positive internal feedback of a few mV.
It also has open collector outputs that can perform a negative-logic wired-OR function.

Schematic of a slew-rate window detector using two LM339 comparators (U1, U2) with +20mV and -20mV reference thresholds set by R2, R3 and R4 from a 10V supply, fed through C1 and R6 from Input; the Output is labelled as going low when input slew-rate is outside the set limit.
 
hackhard said:
will this circuit work , how do i improve it

Circuit schematic showing a potentiometer fed from +10V and 5V references, a 100uF capacitor C1 and 220 ohm resistor R1 feeding the non-inverting input of an LM339N comparator IC1A, with a 5.1k resistor R2 pulled up to +10V at the output.

well, for a start, the DC voltage from the pot isn't going to go through C1

you said you wanted a digital signal ... that isn't going to produce it
You need an ADC chip followed by a microprocessor to work on that data or use a PIC or micro of your choice that has an ADC built inD
 
My previous post assumed you wanted to detect any change. "detect increasing or decreasing pot output".
This circuit only detects a rising voltage.
hackhard said:
increasing V =high output
decreasing or stable V =low output
how can i achieve this?
If you must do it with analogue then you must also specify how you will signal that the voltage is stable. In this circuit you press a momentary switch to load the input set voltage into C1.
How the circuit works.
If not yet buffered, this circuit uses op-amp U1 to buffer the potentiometer output voltage.
Q1 and R1 with the +5V supply makes a current sink of about 440uA. The 440uA flows through resistor R2=47R and so drops about 20mV from the buffered input voltage.
That slightly lower input voltage is compared with the set voltage. If the input rises by more than 20mV then the comparator U2 output goes high. U2 must have very low input bias current so it needs to be a CMOS or JFET input comparator or possibly an op-amp.
Changing the value of R2 will set the rise above the set voltage before detection. R2 can also be adjusted to compensate for the offset voltage of U2. Maybe R2 should be a 200 ohm trimpot.

Circuit schematic of a rising-voltage detector: op-amp U1 buffers a +10V max input, transistor Q1 sinks 440uA through R2 (47R) and R1 (10k) to drop 20mV, and comparator U2 (FETinput) compares against C1 (10uF, low leakage) loaded by a press-to-remember switch.
 
Below is the LTspice simulation of my take on a circuit.
It uses an opamp differentiator circuit to convert the slope change into about a 1V step signal to minimize offset effects. This goes to an opamp comparator circuit to give the desired positive pulse output for a positive slope on the input, and zero volts otherwise.
LTspice simulation of a slope detector: top panel plots V(vin) falling then rising, V(1), V(vref2) and V(out) over 0 to 500 ms; bottom panel is the schematic with an LM324 differentiator and comparator.
 
Baluncore said:
Your example circuit will oscillate and amplify any supply noise.

A differentiator circuit will detect the slew rate of the voltage from the pot. It will not detect slow changes of absolute voltage.
You need to use a window detector. https://en.wikipedia.org/wiki/Window_detector
The LM339 is a comparator with a positive internal feedback of a few mV.
It also has open collector outputs that can perform a negative-logic wired-OR function.

View attachment 109981
That circuit won't detect the polarity of the voltage change.
 
hackhard said:
That circuit won't detect the polarity of the voltage change.
True, my first circuit actually detects both polarities of change, then ORs them together. If you separate the outputs you get two independent outputs, one for a rise, the other for a fall.

You wanted to detect a tiny step change as small as 10mV but you have not specified what positive slew rate you want to detect. Is it +10mV/second?
 
Baluncore said:
You wanted to detect a tiny step change as small as 10mV but you have not specified what positive slew rate you want to detect. Is it +10mV/second?
positive slew rate is +10mV/0.1s = +100mV/s
 
It would help us a lot if you would post what the heck you are trying to do. In engineering, we start with specifications on the circuit performance. You are making us guess what you want to do, which is not a good thing. I will close this thread until you PM me what your goal is and what your circuit specifications are. I will re-open the thread then so you can post that for others to be able to help you better.
 
After a PM conversation, the thread is re-opened. The OP will post more information to help us help him with this project... :smile:
 
project details --
pot rotating clockwise (from any initial angular position)=high output
pot rotating anti clockwise (from any initial angular position)=low output
pot not rotating (stable at any angular position)=low output
 
So talk about using an opamp differentiator circuit followed by some other circuitry. What would that look like, and how would you design it to reject noise and have the desired logic level output?
 
hackhard said:
increasing V =high output
decreasing or stable V =low output
hackhard said:
pot rotating clockwise (from any initial angular position)=high output
pot rotating anti clockwise (from any initial angular position)=low output
pot not rotating (stable at any angular position)=low output

I have three specific questions.
What sense of rotation increases the pot output voltage ?
Do you want to detect the positive or the negative voltage changes from the pot ?
Does the detected situation produce a high or low voltage output from the circuit ?
 
resistance of pot is 50k
that will require the addition of a buffer at the pot output to handle the maximum equivalent pot output impedance of 12.5k.
The modified circuit is shown below:
The added buffer at the pot output is configured as an inverter since the LM324 has a maximum output of about 9V when used as a non-inverting buffer and a 10V supply.can i use lm358 in place of lm324?

LTspice schematic of a slope detector with an LM324 buffer and comparator stages, plus a simulation plot of Vin, V(1), Vref2, V(2) and V(out) from 0 to 500ms.
 
Baluncore said:
What sense of rotation increases the pot output voltage ?
Do you want to detect the positive or the negative voltage changes from the pot ?
Does the detected situation produce a high or low voltage output from the circuit ?
pot rotating clockwise (from any initial angular position)=increasing voltage = high output
pot rotating anti clockwise (from any initial angular position)=decreasing voltage=low output
pot not rotating (stable at any angular position)=stable voltage=low output
i want to detect the positive voltage changes from the pot
detected situation produce a high voltage output from the circuit
 
Attached is an LTspice model. Strip the .txt extension to run the simulation.

To make model plots easier I redefined power supplies (0V,+5V,+10V) to (-5V,0V,+5V).
Use any op-amp you have. Op-amp inputs are close to mid-supply.
You could even use comparators in place of the op-amps.

A "Threshold" of about 10mV is set by R2 with the 200 ohm trim-pot, R3.
Mid-position is about 10mV.
The offset voltages of U1 and U2 are also eliminated from the threshold value by the setting of R3.

Slow changes in pot voltage are followed in C1.
When stable, the voltage at bottom of C1 = "tracking", will be close to the "threshold" voltage.
Slew rate of "tracking" is limited by 5V/R1 = 50uA, with C1 = 500uF, it sets 100 mV/sec.

C2 and R4 quieten the U1 op-amp output when pot voltage is stable.
Otherwise U1 produces a +/-5V signal while following a changing pot voltage.
C2 and R4 are not needed if a comparator is used for U1.

Any positive pot voltage step over 10mV will be immediately detected by U2 going high.

Any pot slew rate rising faster than +100 mV/sec will outrun "tracking".
Once that "tracking" error has accumulated to greater than 10mV, the output of U2 will go high.
Note that for slowly rising voltages, eg for +120mV per sec, it will take 0.5 sec before detection.

50uA will flow in C1. It needs a simple non-inverting follower or buffer from the pot to C1.
Since the input voltage might be close to +5V, a rail-to-rail op-amp is probably needed for the buffer.
 
Attachments
I start thinking digitally...

I would use a sample-and-hold (to save the "previous" value) and then (using a comparator) compare it with with the "present" value.
 
Svein said:
I would use a sample-and-hold (to save the "previous" value) and then (using a comparator) compare it with with the "present" value.
I use a “hold” that is slew rate limited to follow at a maximum of 100mV/sec, then I compare that with the “present” value.

Where would your digital sample signal come from? and how often?
 
Baluncore said:
I use a “hold” that is slew rate limited to follow at a maximum of 100mV/sec, then I compare that with the “present” value. Where would your digital sample signal come from? and how often?
That is in the realm of digital design. It is not hard.

On the other hand, here is a circuit that I have used in the past:
Circuit schematic of an LM339 comparator U1A: input through R1 100 ohm to the non-inverting pin 5, with R2 10k and C1 100p, C2 100n forming a feedback network to inverting pin 4, output at pin 2.

The R1-C1 combination is a noise filter, the R2-C2 combination acts as a time delay circuit. The values given are just examples, modify them at will.
 
Attachments
  • Schematic of an op-amp comparator circuit: input through R1 100 ohm to the non-inverting input, C1 100pF to ground, R2 10k and C2 100n in a delay network, output from LM339 U1A.
    upload_2016-12-9_10-27-0.png
    6.8 KB · Views: 613
Svein said:
On the other hand, here is a circuit that I have used in the past:
For a stable input signal, would the output be high, low or would it drift ?
How could you calibrate it to only detect positive slew rates over +100mV/sec ?
 
Baluncore said:
For a stable input signal, would the output be high, low or would it drift ?
How could you calibrate it to only detect positive slew rates over +100mV/sec ?
  • My schematic was just a sketch - of course there must be some adjustments, one of them being an adjustable offset to avoid problems with a stable input signal.
  • As to only detecting positive slew rates over +100mV/s, that is the purpose of R2-C2. If C2≈0, the comparator will never detect anything, if C2 is too large, it will detect all positive changes.
As usual, a formal specification would help nailing down the actual solution. Since I have been in digital design for about 40years, I have a tendency to think digitally, and the circuit I presented above is an analog counterpart to a classic "edge-detector" we use to create using a Schmitt-trigger and a two-input NAND.

If the detector needs to be very precise, I would use an A-D converter and a microcontroller. Then I could look at two successive samples and decide what action to take.