Having trouble with L298N H-Bridge IC

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The discussion revolves around confusion regarding the operation of the L298N H-Bridge IC based on its datasheet and schematic. The user initially struggles to understand how to enable specific transistors to run a motor in one direction without inadvertently activating others. They clarify that the IN1, IN2, and ENA pins are crucial for controlling the transistors and achieving variable motor speeds. The user later realizes that some AND gates in the schematic have inverting terminals, which resolves their confusion. This insight is shared to assist others who may encounter similar issues with the L298N.
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[SOLVED] Having trouble with L298N H-Bridge IC

I cannot understand how this IC works from the block diagram given in the datasheet. I understand the concept of an H-bridge, but cannot figure how this one operates.

I drew on the schematic to illustrate my confusion.

To run a motor in the given way (red path) you would need to enable the transistor in the top left and bottom right, while disabling the other two. Do to that, the AND gates at the base of those transistors (conducting) need to have two HIGH terminals in order to provide feeder current for the transistors.

However, in order to turn on only those two transistors, you must enable IN1, IN2, and ENA (ENA is simply a pin you enable to power the left H-Bridge of the L298N - is has two as shown).

Given how the wires are connected, there is no way - that I can see apparently - to turn on two diagonal transistors without enabling the other two ..

I obviously must be missing something .. According to what I have read, in order to drive the transistors you need to have IN1 HIGH and IN2 LOW for one direction and the opposite for the other. I just do not see, from this schematic, how that even is possible.

Also note: the ENA/ENB pins are used in conjunction with PWN signals to drive the motor are variable speeds.

-----------------

Here is the original:

paj36.png


And here is the illustration:

wblhD.png
 
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I was actually informed that some of the AND gates had inverting terminals. That completely makes sense now. I did not even catch that.

Even though no one posted I will leave this just in case anyone ever searches with a similar issue and thread gets indexed.
 
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