Designing a PWM Switch with RC Circuit and Schmitt Trigger for 50 Hz Frequency

AI Thread Summary
The discussion centers on designing a PWM switch that outputs an active high signal if the pulse width exceeds 1500 microseconds at a frequency of 50 Hz. The initial approach involved using an RC circuit and an op-amp comparator, but it was noted that this method wouldn't sustain an active high signal throughout the PWM period. Suggestions included utilizing a 555 timer in monostable mode to create a reliable clock signal and employing a D flip-flop to manage the output based on the PWM input. Challenges arose with the timing of the clock signal relative to the PWM, leading to further exploration of circuit modifications to improve response time. Overall, the conversation emphasizes the transition from analog to digital solutions for better reliability in PWM signal processing.
icculus723
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i am trying to design a switch that will output an active high if the width of the received PWM signal is greater then 1500 uS. if it is shorter then this time then it should output an active low. The frequency of this signal is 50 Hz.

I designed a RC circuit with a cutoff frequency of 50 hz, and found a threshold level of 1.9 volts (when a 1500 uS pulse is passed through it) then planned to set that as VREF into an op amp comparator, but it obviously wouldn't maintain an active high signal for the entire period of the signal (unless the PWM signal was high for the whole .02 s. )

thought about adding an additional capacitor after the RC circuit.. but worried that will slow the response time down significantly..
also just ran into schmitt triggers today, though i was having trouble simulating them in pspice

any ideas?
thanks- brian
 
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icculus723 said:
i am trying to design a switch that will output an active high if the width of the received PWM signal is greater then 1500 uS. if it is shorter then this time then it should output an active low. The frequency of this signal is 50 Hz.

I designed a RC circuit with a cutoff frequency of 50 hz, and found a threshold level of 1.9 volts (when a 1500 uS pulse is passed through it) then planned to set that as VREF into an op amp comparator, but it obviously wouldn't maintain an active high signal for the entire period of the signal (unless the PWM signal was high for the whole .02 s. )

thought about adding an additional capacitor after the RC circuit.. but worried that will slow the response time down significantly..
also just ran into schmitt triggers today, though i was having trouble simulating them in pspice

any ideas?
thanks- brian

Welcome to the PF.

First, a tip. "Seconds" is usually written as a small "s". Capital "S" is Siemens, the inverse unit for Ohms.

Second, can you use a digital solution? You could use a clock source around 10MHz, and do dividers and logic to make this work very reliably. The analog methods you are mentioning will not be very accurate, and will give varying results over your operating temperature range.
 
Why not tune a 555 timer for 1500 us and trigger the 555 with the rising edge of the pulse. (The pulse will have to be inverted to trigger the 555) Then use the output of the 555 to clock a D flip flop with your pulse going to the D input.
 
thanks for the replies, I may go with the LM555 route since I am familiar with using them... would i set up the D-Flip Flip as rising edge triggered then have the LM555 spit out anything beyond 1500 us on the rising edge of the flip flop? similar to the picture attached but on the rising edge.. I guess I am just not entirely sure on what the 555 is doing.
thanks!
 

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icculus723 said:
thanks for the replies, I may go with the LM555 route since I am familiar with using them... would i set up the D-Flip Flip as rising edge triggered then have the LM555 spit out anything beyond 1500 us on the rising edge of the flip flop? similar to the picture attached but on the rising edge.. I guess I am just not entirely sure on what the 555 is doing.
thanks!

or wait i guess i would just set the 555 to be a 50 hz frequency signal with a pulse width of like 1501 us, have that be the clock for the D flipflop and then have it be falling edge triggered. Then send the PWM signal I am getting as the input to the flip flop..
 
skeptic2 said:
Why not tune a 555 timer for 1500 us and trigger the 555 with the rising edge of the pulse. (The pulse will have to be inverted to trigger the 555) Then use the output of the 555 to clock a D flip flop with your pulse going to the D input.
i triggerd the 555 off of the incomming PWM signal and set it up as a 1500 us clock in monostable mode, the problem is, the incomming signal must go low again before the clock will go low. so basically the PWM signal rises before the clock, and falls after the clock reguarless of the PWM signal...
any other ideas?
 
icculus723 said:
i triggerd the 555 off of the incomming PWM signal and set it up as a 1500 us clock in monostable mode, the problem is, the incomming signal must go low again before the clock will go low. so basically the PWM signal rises before the clock, and falls after the clock reguarless of the PWM signal...
any other ideas?

What is the application? This is beginning to sound a lot like schoolwork. You need to do the bulk of the work on your school projects.

And why not do it digitally like I mentioned earlier? It will give you the best results, and is pretty simple to design and build...
 
Could you draw a diagram of how your circuit is wired? I'm guessing you're trying to send an FSK signal on a power line. There's probably no one on this forum that knows more about that than Berkeman.
 
skeptic2 said:
Why not tune a 555 timer for 1500 us and trigger the 555 with the rising edge of the pulse. (The pulse will have to be inverted to trigger the 555) Then use the output of the 555 to clock a D flip flop with your pulse going to the D input.

skeptic2 said:
Could you draw a diagram of how your circuit is wired? I'm guessing you're trying to send an FSK signal on a power line. There's probably no one on this forum that knows more about that than Berkeman.

This is just a quick drawing of it... pretty sure this is how i got it wired though.
strange thing is, i accidentally connected the positive terminal of a 2nd power supply (That was not powered on, a second power supply had everything running) to the trigger input of the 555 (along with the PWM signal ) ... and it held the clock at the 1500us regardless of pulse width...

oh and i inverted the output of the 555 since the flip flop is triggered by the rising edge, so i wanted the rising edge at 1500us, not 0s...
 

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  • #10
Your circuit looks good, however I'm not sure I understand your post #6. Are you saying that the period of a short pulse of incoming signal (the time from rising edge to rising edge) is less than 1500 us?
 
  • #11
skeptic2 said:
Your circuit looks good, however I'm not sure I understand your post #6. Are you saying that the period of a short pulse of incoming signal (the time from rising edge to rising edge) is less than 1500 us?

well if the pulse is less then 1500us the clock works fine, and will stay at 1500us. but if the pulse is longer then 1500 us, the clock follows the incoming signal and doesn't go low until the pulse goes low.
 
  • #12
Between the output of the inverter connected to pin 2 of the 555, and pin 2, connect a 0.001 uF cap in series and from pin 2 of the 555 connect a 10 k resistor to Vcc (basic input pull-up configuration) and see if that helps.
 
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