- #1
smuscat
- 31
- 0
I need some help how to build 8 bit up/down counter for my tracking ADC. All ideas are welcome.
How can i build 8 bit UP/DOWN counter using two 74191?
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The discussion revolves around building an 8-bit up/down counter using two 74191 chips for a tracking ADC application. The user is struggling with the circuit, particularly with the countdown functionality, despite successfully implementing a single counter. The conversation highlights the need for proper cascading of the counters, with emphasis on ensuring that the ripple clock from the first counter correctly triggers the second counter. Participants suggest troubleshooting by isolating the counters and reviewing application notes for the 74191. The user describes their approach to enabling the first counter to count down based on the output of the second counter, indicating ongoing challenges with the design.
- #2
berkeman
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smuscat said:
Check out the first thread listed below in the "Similar Threads" section. Does it help?
- #3
smuscat
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- 0
berkeman said:
It didn't help me so much,his circuit is more complex than mine. I need how to connect the two 74191 to built an 8 bit up/down counter.My idea of the counter is to use it as DAC as binary weighted resistors network.Finally I want to built Tracking ADC.
- #4
berkeman
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smuscat said:
We don't do your school project work for you, smuscat. You need to do the bulk of the work. Show us your ideas about how to do the counter, and how you are going to use it as part of an ADC. Once you show us your work, we can offer tutorial comments that may help. You are required to do the bulk of the work on your project.
- #5
- #6
berkeman
Admin
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smuscat said:
Why are you using an opamp as a gate? Can you post your equations and K-Map that you used to design this? How did you derive that gate arrangement?
- #7
smuscat
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berkeman said:
The opamp is used as a compartor(+ i/p is from DAC, - i/p is analogue ) .When the second counter starts counting down ,the first counter is enabled to count down only when the second counter outputs are all 0.
- #8
skeptic2
- 1,776
- 60
Why don't you get one counter working first and then add on the second one. Off hand it seems to me you have a number of errors. Have you looked for some application notes for the 74191? (AN 74191)
- #9
smuscat
- 31
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skeptic2 said:
I tried a single counter and it worked fine.The datasheet states that for cascading counters the ripple clock o/p of the 191 is fed to the clock i/p of the second 191 ,i tried it didn't worked when count down.My problem is when begins to count down.
- #10
skeptic2
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Which is your first 191 and which is your second?
- #11
smuscat
- 31
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skeptic2 said:
The first one is with the gates.
- #12
skeptic2
- 1,776
- 60
I should have asked which is the lower 4 bit counter and which is the higher 4 bit counter?
It also might help if you could describe how it is supposed to work count by count. What is the state of the inputs and outputs when you start? What happens when your clock ripples from the first counter to the second one?
It also might help if you could describe how it is supposed to work count by count. What is the state of the inputs and outputs when you start? What happens when your clock ripples from the first counter to the second one?
- #13
smuscat
- 31
- 0
skeptic2 said:
The lower bit counter is on top left corner of the image.The counter works as follows.
First, the Data inputs of the counters are all at 0 level.
When I load the inputs simultanously,the first counter starts to count up,when it reaches
maxium count the counter's ripple clock is fed to the second counter and continues to count, at this stage works perfectly!
The problem is when count down from the second counter to the first counter.
I tried to solve the problem by making a NOR gate from the outputs of the second counter
_
to the input of the UP/DOWN count first counter to enable the first counter ONLY to COUNT DOWN when the outputs of the second counters are all at 0 LEVEL.
- #14
skeptic2
- 1,776
- 60