How Do You Reduce Capacitor Values in a Circuit?

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Discussion Overview

The discussion revolves around the methods for reducing capacitor values in a circuit, specifically focusing on a homework problem related to an electrical engineering network analysis class. Participants explore the configuration of capacitors and the implications of their connections.

Discussion Character

  • Homework-related
  • Technical explanation
  • Debate/contested

Main Points Raised

  • One participant seeks tips for reducing capacitors, mentioning a specific value of 100uF but expressing confusion about the process.
  • Another participant references a source that states a combination of 50uF and 150uF capacitors in parallel with a 200uF capacitor, questioning the validity of this configuration.
  • A mentor suggests using KCL equations to analyze the circuit and encourages the participant to clarify their understanding of "reducing" the capacitors.
  • One participant identifies that the 50uF and 150uF capacitors are in parallel, which another participant acknowledges as a realization they had missed.
  • There is a mention of a wye to delta conversion, with one participant noting that they have not fully covered this topic yet.
  • Another participant cautions against misinformation regarding the series and parallel connections of the capacitors, asserting that the 50uF and 150uF capacitors are not in series as previously stated.

Areas of Agreement / Disagreement

Participants express differing views on the configuration of the capacitors, particularly regarding their series and parallel relationships. There is no consensus on the correct interpretation of the circuit connections.

Contextual Notes

Participants reference specific capacitor values and configurations, but there are indications of confusion and varying levels of understanding regarding circuit analysis techniques such as KCL and wye-delta transformations.

soundguyAL
< Mentor Note -- thread moved to HH from the technical forums, so no HH Template is shown >[/color]

Hi All.

Can someone give me some tips/tricks for reducing these capacitors?

I understand that, when reduced, the value is 100uF but I don't get it...

Thanks for your help.

cir 1.jpg
 
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Where I got the 100uF...

My source states that 50 || 150 and in series with the 200...
How is that? I just don't see it.
 
Welcome to the PF. :smile:

Since this is a schoolwork-type question, this thread may get moved to the Homework Help forums. But for now we can try discussing it here in the EE forum (since it seems to be a general procedural question that you have).

What do you mean by "reducing" those 3 capacitors? Are you thinking there is some parallel/series combination, or a Y-Delta transformation? I'm not seeing those, but I could be wrong. I would just attach a ground symbol to the bottom of the left voltage source and write the KCL equations for before and after the switch is closed and solve for the voltages and currents.
 
Thanks for the welcome!

Yes... this is a HW problem for an EE network analysis class.
I didn't realize this was the wrong forum to post in.
I'm trying my best to understand circuits and its coming slowly.

Thanks for the help!
 
No worries. Yeah, for homework questions, we requre that they be posted in the Homework Help forums, and when you start a thread there, you are provided with a Template to fill out -- it helps you organize your problem and show your initial work. I'll move your thread there now.

So, have you tried the KCL approach? Or has the instructor said that there are simplifications in this circuit that make the problem easier?
 
soundguyAL said:
Where I got the 100uF...

My source states that 50 || 150 and in series with the 200...
How is that? I just don't see it.
Focussing on the 50uF and 150uF caps we see each has one plate connected to the other (and this junction connected to the 200uF), and the remaining plate of each is likewise connected to the other's (they are sharing a common node). So the 50uF and 150uF are parallelled.
 
NascentOxygen said:
So the 50uF and 150uF are parallelled.
Ah, good. I missed that. Thanks NO!
 
ohh.. In my mind I was going through the resistors to try to see the parallel. I was looking at the circuit like this...
cir 1_2.jpg

I see it now... Thanks a bunch!
 
From your first diagram, the series connection of the 50 and 150 uF capacitors are in parallel with a short circuit.

You might want to check out the wye to delta conversion. The initial configuration of the 3 capacitors is a wye connection.
 
  • #10
magoo,
we kinda skimmed over wye and deltas.
I'll look at those. I'm sure I'll need them.

Thanks.
 
  • #11
magoo said:
From your first diagram, the series connection of the 50 and 150 uF capacitors are in parallel with a short circuit.

Be careful not to disinform the OP. In the first diagram the 50μF and the 150μF are not in series.
 
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