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How does a FET amplify voltage?

  1. Apr 6, 2008 #1


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    Hi, just logged on first time in ages. Got a message saying that my password was 563 days old lol.

    Right now, I'm in first year of uni so very stupid :smile:
    Anyways, we're studying about field-effect transistors. I understand how the gate controls the current via adjusting the size of the n-channel. What I'm quite confused right now is how it amplifies voltage. Maybe I already "know" the answer but I don't realize it.

    In any case, I'll attempt to "explain" how it amplifies and anyone who can correct me please do so. I've included a basic circuit drawing containing a FET. So here goes...

    When the voltage of the gate relative to the drain is negative, the n-channel tapers towards the drain terminal. Even if the n-channel no longer touches the drain terminal, a current still flows. However, as voltage G relative to D becomes even more negative, the resistance in the drain resistor increases proportionally. This means that the current stays constant, while the voltage of the drain resistor can be enlarged.

    Okay, my problem is, I have this idea (wrong assumption?) that an amplifier uses a small input voltage and turns into a large output voltage. However, in my "explanation", all it did was to state that the voltage of the drain resistor can be enlarged while maintaining a constant current. It's like the analogy of a kid lifting a toy airplane above his head and saying "It can fly!".

    So please can anyone get me out of this hole. It'll be appreciated that the explanation is done in accordance with my circuit attachment (or if the circuit is not for amplication, please tell me so and why).

    Thanks in advance.


    Attached Files:

  2. jcsd
  3. Apr 6, 2008 #2


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    Oh wait, I've just read an explanation on its amplification ability but I stilll don't get it. Using, the same circuit, if GS has a small varying voltage, a large varying current flows bewteen the source and drain. This current flows through the drain resistor,across which an amplified version of the original voltage is formed.

    How does this work? Does a large current flows in the resistor because the resistance in the branch that contains the GS voltage has hardly any resistance and thus the current through GS becomes very large and adds to the current flowing between the source and drain?

    *Hopeful that this is the answer*


    PS, even if my new perspective on it is correct, please give your explanation too!! Thanks.
  4. Apr 6, 2008 #3


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    LOL, i'm having a conversation with myself...
    Anyways, since the gate is insulated from the other terminals, gate current is zero. Thus my previous explanation about how a large current can be formed due to gate current is so blatantly wrong. D'oh! *make note to self: "don't quit your day job"* Oh wait, I don't have a day job...no engineering company is dumb enough to hire me. Hehe.
  5. Apr 6, 2008 #4
    v = iR right?

    In this case, i = id which is easily controlled with gate voltage.

    v is the voltage across the resistor.
  6. Apr 6, 2008 #5


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    you're getting FETs in the first year? i had calculus and physics. in my second year we had KCL, KVL, node-voltage method, loop-current method, and ideal voltage and ideal current sources (both independent and dependent). i guess an FET would be modeled as a voltage-controlled current source.

    anyway, the thing to remember is that these transistors (be they FET or BJT) do not have little power sources inside of them. they are fundamentally valves of some sort (the term "valve" is what the brits call "vacuum tubes", an older counterpart to FETs and BJTs). so the reason that they can be hooked up to a DC power supply and be made into an amplifier has to do with the volt-amp characteristics of the devices. how do they get those volt-amp characteristics? that requires taking solid-state and semiconductor physics, far beyond the first year at the uni.
  7. Apr 6, 2008 #6
    The answer is in the acronym "FET", which stands for "field effect transistor". A time-varying signal at the input terminals (gate-source) effectively modulates the electric field in the drain-source channel of the FET device. As a result the resistance of the channel is modulated and the drain current is an amplified facsimile of the input signal. A resistor in the drain will translate this current signal into a voltage signal if needed.

    At the 1st year level, active devices are usually treated as "black boxes". The emphasis is on the external I-V relations at the terminals and temperature dependence. The internal semiconductor physics is more advanced and will be introduced later.
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