Interpretation of a memristor's hysterisis loop

  • #1
5
0

Main Question or Discussion Point

Hi forums,
Following is the hysteresis loop of a standard memristor:
attachment.png

Please note that, the red one is for lowest frequency and black for highest frequency.

From the graph, one can take the following observations:
1> As frequency increases, area of graph decreases
2> With increase in frequency, graph tends to tilt more towards x axis
3> Slight deformity of the red curve at higher VI values.

I tried interpreting these observations, keeping in mind memristors Piecewise linear model(Is that a correct assumption?).

If second observation is correct:- Memristance decreases with increase in frequency and at frequency tending to infinity, it acts like a constant value resistance whose value should be Minimum possible value of memristance. Right?

Also, I need a bit explanation for observation number 3(about deformity). I'm unable to figure out it's reason.

Thanks,
[moderator edited out the OP's name and cross posting info.]
 

Attachments

Last edited:

Answers and Replies

  • #3
5
0
Yup, I had a look at it. I'm mostly comfortable with the physics, just had few questions about shape of hysteresis loop, the ones that i mentioned in my earlier post i couldn't correlate that to theory. Mainly, these two:

2> With increase in frequency, graph tends to tilt more towards x axis
3> Slight deformity of the red curve at higher VI values.

What's the reason of this tilt in 2? and deformity in 3?
 
  • #5
5
0
Ok, thanks. Skin effect could be a reason, i'll dig deeper into it.
 
  • #6
phinds
Science Advisor
Insights Author
Gold Member
2019 Award
15,907
5,585
Ok, thanks. Skin effect could be a reason, i'll dig deeper into it.
But it's only skin deep :smile:
 
  • #7
5
0
Ok, got one more strong argument for (3) observation i.e slight deformity at higher i-v values. In this paper:
M. D. Pickett, D. B. Strukov, J. L. Borghetti, J. J. Yang, G. S. Snider, D. R. Stewart, and R. S. Williams, “Switching Dynamics in Titanium Dioxide Memristive Devices,” J. Appl. Phys., vol. 106, p. 074508, 2009.

They explained the dominance of tunneling effect at higher voltages, which could lead to the observed slight deformity in memristor's i-v curve.
 
  • #8
Lord Jestocost
Gold Member
532
360
Following is the hysteresis loop of a standard memristor:
attachment-png.png
I guess that these loops are calculated on base of the "memristor" model presented by Strukov et al. in their paper "The missing memristor found". If this is the case, there are no more physics in than a simple linear-drift model for mobile dopants.
 

Attachments

  • #9
5
0

Related Threads on Interpretation of a memristor's hysterisis loop

  • Last Post
Replies
6
Views
3K
Replies
1
Views
3K
  • Last Post
Replies
1
Views
616
  • Last Post
Replies
11
Views
5K
  • Last Post
2
Replies
28
Views
11K
Replies
0
Views
1K
Replies
4
Views
637
Replies
2
Views
722
Replies
3
Views
1K
Top