Inverter propagation delay using the RC delay model

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SUMMARY

The discussion centers on the RC delay model for inverters, specifically addressing the roles of NMOS and PMOS transistors. It is established that both NMOS and PMOS have equivalent RC models, and the on-resistance of the PMOS is included in the delay model when it is activated. The confusion arises from the PMOS being an open circuit when off, but when on, its resistance is factored into the inverter's equivalent RC model. The output is connected to a small signal ground, making the delay model for both transistors equivalent in this context.

PREREQUISITES
  • Understanding of NMOS and PMOS transistor operation
  • Familiarity with RC delay models in digital circuits
  • Knowledge of small signal analysis in electronics
  • Basic concepts of inverter design in CMOS technology
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  • Study the RC delay model for NMOS and PMOS transistors in detail
  • Learn about small signal analysis techniques in CMOS circuits
  • Explore inverter design principles and their impact on performance
  • Investigate the effects of on-resistance in various transistor configurations
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Electrical engineers, circuit designers, and students studying digital electronics who seek to deepen their understanding of inverter delay characteristics and transistor behavior in CMOS technology.

Toyona10
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Hi~

Actually I am fine with calculating the delay but I haven't got the concept clearly enough. Both nmos and pmos have their equivalent RC models. I understand how the RC model of nmos works when its on or off but I don't get how the pmos turns out this way. When its off, the upper part won't work because its open circuit but when its on, isn't the resistor supposed to be included? Why isn't it there in the inverter's equivalent RC model when the pmos is on?
 

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The resistor in the RC delay model is either the PMOS or the NMOS. They are both connected to "ground" because in either case the output is connected to a small signal ground (VDD in the PMOS case or VSS in the NMOS case) so as far as the delay model is concerned they are equivalent.

So to answer your question, yes the delay model does include the on-resistance of the PMOS when it is on.
 

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