Issue with Cancelling ESL for Input Capacitors

In summary, Craig is trying to set up a DC power supply filter for a 2kW motor controller. He is trying to set up inductance cancelling for the input capacitor array, but when he simulates the transient response he is still getting voltage spikes due to input capacitor ESL. He is not understanding why the filter is failing to attenuate those spikes. Someone please explain to him what's happening.
  • #1
94
19
I'm trying to set up a DC power supply filter for a 2kW motor controller. I'm trying to set up inductance cancelling for the input capacitor array. When I simulate the coupled T filter in the frequency domain I get what I expect to see. However when I simulate the transient response I'm still getting voltage spikes due to input capacitor ESL. I'm not understanding why the filter is failing to attenuate those. Can someone please explain to me what's happening? See attached plots below.

TIA,

- Craig

respons_ac.PNG
response_transient.PNG
 
Engineering news on Phys.org
  • #2
Looks like you need a snubber on the output, a series R-C probably slightly over damped. Connect from output to ground if you are worried about spikes in the load, but they are typically needed across the Transistor for protection, especially for an inductive load.

As it stands, probably the T-filter is resonating with the Transistor output capacitance. In the real world there will also be the stray capacitance of both the wiring and the inductors. Also, if you haven't already, consider the 200nH source inductance.
 
  • #3
Thank you for your reply.

I actually figured out why the coupled T-filter doesn't work for me in this case. Turns out unlike a typical shunt capacitor it only filters the supply side. It does work in an excellent manner by cancelling ESL on the supply side, but does not do the same job on the output side. If anything it increases output reactance. Spent a lot of time trying to understand that filter and got kind of frustrated though I think I get it now. It's pretty trick but limited in application.

Yeah I'm running snubbers at the drain-source of each transistor which cleans up some of the noise. Otherwise I'm running an array of MLCCs at each of the half bridges shunting the the high and low side (it's a BLDC controller). Doing that Introduces minimal parasitic ESL and gets voltage spikes within tolerance. Not perfect but pretty good. The plus side is I can bail on using large bulk capacitors that are tricky with high currents and their higher ESL.
 
Last edited:
  • #4
Thanks for the update. Sounds like you got it beaten into submission; and I learned something about the T-filter.
 
  • #5
I tell you, I do a lot of circuit design as a hobby and it really does feel like you have to beat things into submission sometimes, haha. Yea it's pretty cool. I never looked into a filter like that before, but in building a 50V BLDC controller capable of 50 Amps plus I figured there had to be a way to cancel out the pesky parasitic inductance that serves hell with switching high currents.

Spent a lot of time looking and that was the best I found. If noise is on the supply side that filter does an amazing job killing off those inductive effects. Just too bad I could not find or think of a way to get it to cover heavy load switching from the output side. Believe me I tried all kinds of iterations via simulation inserting coupled inductors here or there and could not find a way to do it. Actually I did find a way, but it's necessary to couple the parasitic inductance of the capacitor with the inductor on the output side of the T. Works great in simulation, actually cancels inductance on all three legs, but it's not something you could physically do. There's no way to couple inductance that's originating from inside the capacitor.

Anyway what I have in mind now will do the job and it's actually better that I don't have to use those bulky electrolytics with all their failings. Though the DC bias of MLCCs is a real pain. You have to go with a good number of larger size smaller value caps to cover it. Won't someone please invent the perfect capacitor already? It would be worth a million, no a trillion.
 
  • #6
Looking at the waveforms you posted, it seems that the ringing is under damped. Little hard to tell with that resolution though. Of course when it's built everything will change anyhow!
 
  • #7
Yeah you do have to take simulations with a grain of salt. Though they're usually not completely off either. I actually went to the trouble of making a couple nice screen captures, but the forum reduced the images and they lost a lot of resolution. Anyway it was just a quick circuit I drew up to demonstrate what I was talking about. Here's a screenshot of the actual one I'm checking things with, this is posted on my personal space where it won't lose resolution; http://webpages.charter.net/chblock/BLDC_controller.png [Broken].
 
Last edited by a moderator:

1. What is ESL and why is it important for input capacitors?

ESL stands for equivalent series inductance and it is an inherent property of all capacitors. It represents the amount of inductance present in the capacitor due to its physical structure and can have a significant impact on its performance. In input capacitors, ESL is important because it can cause voltage spikes and ringing, which can lead to circuit malfunctions or failures.

2. What are the common issues with cancelling ESL for input capacitors?

The main issue with cancelling ESL for input capacitors is that it is a difficult and complex process. It involves designing and implementing a system of additional components, such as inductors or resistors, to counteract the effects of the capacitor's inherent ESL. This can be challenging and time-consuming, and if not done correctly, it can actually worsen the performance of the capacitor.

3. Can ESL be completely eliminated for input capacitors?

No, it is not possible to completely eliminate ESL for input capacitors. As mentioned earlier, it is an inherent property of all capacitors and cannot be completely removed. However, it can be minimized to a certain extent through careful design and selection of components.

4. What are some techniques for reducing ESL in input capacitors?

There are several techniques that can be used to reduce ESL in input capacitors. One approach is to use multiple smaller capacitors in parallel instead of a single large one, as this can reduce the overall ESL. Another technique is to use low-ESL capacitors, which are specifically designed to have lower inductance. Additionally, careful placement of the capacitors on the circuit board and using short, wide traces can also help reduce ESL.

5. How can I determine the ESL of an input capacitor?

The best way to determine the ESL of an input capacitor is to consult the manufacturer's datasheet. It will typically include information on the capacitor's ESL and other electrical properties. Alternatively, you can also measure the ESL using specialized equipment, such as an impedance analyzer. However, this may require technical expertise and specialized knowledge.

Suggested for: Issue with Cancelling ESL for Input Capacitors

Back
Top