Latches and flip flops - how is stable state defined?

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Discussion Overview

The discussion centers on the definition of "stable state" in the context of latches and flip-flops, particularly how it relates to their behavior in digital circuits. Participants explore the nuances of stability, transient states, and the conditions under which a state is considered stable or unstable.

Discussion Character

  • Conceptual clarification
  • Debate/contested
  • Technical explanation

Main Points Raised

  • One participant questions the definition of "stable state," noting that a configuration where Q is 1 after applying S=1 and R=0 is described as stable, yet the textbook contradicts this.
  • Another participant suggests that the textbook may refer to transient states occurring during input changes, where outputs can temporarily reach invalid states (1-1 or 0-0) due to propagation delays.
  • A different viewpoint emphasizes that a stable memory state is one that persists even when inputs return to neutral levels, distinguishing it from states that depend on continuous input.
  • Another participant discusses the concept of stability in electronics, explaining that it involves returning to an original state after perturbation, and mentions the role of non-linearity and thresholds in bistable circuits.
  • The concept of hysteresis in circuits like Schmitt triggers is introduced, highlighting how these circuits manage noise and require significant input changes to switch states.

Areas of Agreement / Disagreement

Participants express differing interpretations of what constitutes a "stable state," with no consensus reached on the definition. There are multiple competing views regarding the conditions and characteristics of stability in latches and flip-flops.

Contextual Notes

Participants note that the term "stability" can refer to various concepts, which may contribute to confusion. The discussion also highlights the importance of distinguishing between stable configurations and stable memory states.

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Latches and flip flops - how is "stable state" defined?

My textbook and professor both make numerous references to "stable state" of a latch of flip-flop, but never actually define it.
It's not intuitive. For instance, if the present output Q is 0, and we input S=1 and R =0, the circuit's next state, Q+ , is 1, and this is a stable configuration, but the textbook says this is not a stable state.
So what does "stable state" actually mean in this context?
 
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I'm not aware of how the application of a steady state 1-0 or 0-1 input to an S-R latch (using nor2 or nand2 gates) can result in an unstable state except during the period of transition. But I expect the textbook is correct and I am missing some information. Perhaps it is referring to the transient state during which the output is 1-1 (nand) or 0-0 (nor) due to propagation delays.
 
Same-same said:
My textbook and professor both make numerous references to "stable state" of a latch of flip-flop, but never actually define it.
It's not intuitive. For instance, if the present output Q is 0, and we input S=1 and R =0, the circuit's next state, Q+ , is 1, and this is a stable configuration, but the textbook says this is not a stable state.
So what does "stable state" actually mean in this context?
I'd need you to sketch the gate arrangement to be sure, but I think you will find that a state which exists only while it is forced by the continued presence of a peculiar input is considered not a stable state. A stable memory state is one that will be maintained even when the inputs revert to their inactive/neutral level (the STORAGE state).

I can't comment on any distinction re a "stable configuration" vs "stable state"
 
The word 'stability' can refer to several different things. This can lead to confusion.
Stability, in this context usually refers to a situation in which, when a small perturbation is introduced, a system will return to its original state. In electronics, you can get stability with positive feedback (as with a simple 'bistable' circuit - Google gives dozens of hits). Stability in this sense requires some non-linearity. Once the bistable circuit is in one state (i.e. the output is hi or lo) then the input signal needs to cross a certain threshold value for the state to change - then the output state will swing to the other stable state. So the input output characteristic will be a 'step'.
A Schmitt trigger is another circuit which has 'hysteresis' which is a decision making circuit that cuts out the effect of low level noise on a signal. Once the input reaches a certain level, the Schmitt 'decides' it's high enough in level so it 'flips', the input signal then needs to go to a significantly low level before it decides to flip back.
 

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