Low and High Frequency Signal Equivalent

[DODGEVIPER13]

Homework Statement

Assume λ≠0. Also bypass capacitor is very large compared to coupling capacitor.
a.) Draw the low frequency small signal equivalent and derive lower 3dB frequency formula.
b.) Assuming transistor high frequency capacitances, draw the high frequency small signal equivalent and derive upper 3dB frequency formula
c.) What is the maximum gain of this amplifier? Finally draw the magnitude. Oh and the circuit is in the thumbnails

I only need help with b and c

Homework Equations

The Attempt at a Solution

I have figured out part a and have drawn part b I have it drawn such that it goes from ground to Vs and then to Rs, with cc1 shorted, and then Rg in parallel with Vs then Cgs in parallel with Rg and Cgd in series with the ground terminal of the mosfet. I have the dependent source connected to ground and going up as the circuit is PMOS at GmVsg and the ro, Rd, and Rl are all in parallel and on Vo. Now what I am wondering is how do I get Ceq I have Req=ro in parallel with Rd in parallel with Rl. I mean there isn't a cap on the output side so I am confused on how to find the upper frequency I know the formula is 1/(2pi(τ)) where τ=RC I think Ceq=Cgs+Cgd. Sorry for the terrible writing quality but I don't have a way to scan in my circuit nor a way to draw it.

 

[rude man]

To do part (b) you probably want to simplify the usual 6-or-so-capacitance model for the MOSFET. I suggest cutting down to one or two. (Some of the other capacitances are removed by virtue of the heavily bypassed source anyway).

The biggest contributor to limiting the high-frequency response is probably Cgd, aka the "Miller" effect. Any voltage variations in the drain get fed back to the gate thru this capacitance.

The second-biggest contributor is probably Cgs which, since the source is heavily bypassed, is just the capacitance from the gate to ground. So just parallel Rg with Cgs.

 

[DODGEVIPER13]

Thanks man I got it figured it out