Why Does My LTSpice NDG Transistor Mixer Output Not Exceed 0.3V?

[perplexabot]

Hello all. So i have been trying to simulate a ndg transistor mixer in LTSpice. Here is what I have so far, but I am missing something and I can't figure what it is... Here is the schematic along with the waveforms.

For some reason the output will not go over 0.3V (do I have to bias it?). Anyone know what is wrong?

Thank you for your time.

 

[analogdesign]

You have to bias the second gate (G0) I think at a higher voltage than the first one (whatever the vdsat of gate one is).

Think of a dual gate as a simple cascode amplifier (look it up in wikipedia). Then it will be obvious how to bias the two gates.

 

[davenn]

dunno if this helps

here's an example of a working dual-gate MOSFET mixer in a VHF receiver
that I have done much work on over the years

Maybe give you some ideas
as you can see there is no direct DC biasing applied to either of the gates

cheers
Dave

 

[perplexabot]

You have to bias the second gate (G0) I think at a higher voltage than the first one (whatever the vdsat of gate one is).

Think of a dual gate as a simple cascode amplifier (look it up in wikipedia). Then it will be obvious how to bias the two gates.

Thank you for your help. I have tried biasing both gates and nothing worked for me. So Vg2 = (Vg1 - Vto) + Vgs2 = 4 - 1 + 2 = 5?

I am not sure if this is right. But here is the schematic with the biasing of G2 and the corresponding output. It is still not working :(

 

[perplexabot]

dunno if this helps

here's an example of a working dual-gate MOSFET mixer in a VHF receiver
that I have done much work on over the years

Maybe give you some ideas
as you can see there is no direct DC biasing applied to either of the gates

cheers
Dave

Hey! Thank you for that schematic and your help. Pretty cool, the dual gate mosfet seems to be used almost the same way. You pointed out it wasn't dc biased... It also isn't using emitter feedback... It is also using the tuned LC at the output to resonate the signal needed. I tried adding that LC circuit at the output but it still didn't help. I will study your schematic a bit more. Hmmmm. I wonder what is wrong...

 

[davenn]

no probs
As said .. maybe an actual cct will give you some ideas to experiment with

The output from the drain of the MOSFET is 10.7MHz, followed by L16 LC filter, followed by a 10.7MHz crystal filter

The receiver is operating at ~ 151 MHz, therefore the LO is ~ 140 MHz

cheers
Dave

 

[vk6kro]

The gate 1 resistor should return to ground, not to the source.

The resistor and capacitor in the source circuit are there to develop a positive voltage on the source.
Grounding the gate resistor makes the gate negative relative to the source, biasing it.

Also, try reducing the drive voltage to a small value. Maybe 50 mV. This will stop overdriving the gate 1 input.

 

[perplexabot]

The gate 1 resistor should return to ground, not to the source.

The resistor and capacitor in the source circuit are there to develop a positive voltage on the source.
Grounding the gate resistor makes the gate negative relative to the source, biasing it.

Also, try reducing the drive voltage to a small value. Maybe 50 mV. This will stop overdriving the gate 1 input.

Thank you, so I have changed the G1 input to 50mV amplitude. This has had a dramatic effect on the output. So if I am not mistaken, one of the gate inputs will constantly turn on and off by going above and below the Vto (threshold voltage)? That is why you chose 50mV?

So i also need to limit the incoming signal's voltage to 50mV... That's probably where a step down transformer would come in handy, right?

Here are the waveforms and the new schematic.

I believe it is working correctly now. Thanks...

 

[vk6kro]

The FET Gate 1 has to be biased negatively relative to the source so that the input waveform does not drive the gate positive or more negatively than the cutoff voltage.

So there is a region of negative voltage where the output should be a sinewave.

You need to set the G2 voltage temporarily to some fixed value (say 2 volts DC) and get the output to be a clean sinewave, but hopefully larger than the input.

After that, you can try applying an AC signal to G2. This signal should not drive G2 negative, so it must have a peak amplitude of less than 2 volts if that is the DC bias level on G2.

You should not be getting square waves out.

 

[perplexabot]

The FET Gate 1 has to be biased negatively relative to the source so that the input waveform does not drive the gate positive or more negatively than the cutoff voltage.

So there is a region of negative voltage where the output should be a sinewave.

You need to set the G2 voltage temporarily to some fixed value (say 2 volts DC) and get the output to be a clean sinewave, but hopefully larger than the input.

After that, you can try applying an AC signal to G2. This signal should not drive G2 negative, so it must have a peak amplitude of less than 2 volts if that is the DC bias level on G2.

You should not be getting square waves out.

So just to make sure I get this, you are saying, the first step is to dc bias gate 2 and send a sin wave through gate 1. Make sure to have a sin wave with some gain at the output.

After this step is complete, REPLACE the dc bias at gate 2 with a sin wave who's peak does not exceed the previous DC bias. Is this correct? Or do we add (or superpose) the sin wave at gate 2 to it's dc bias? Basically, does the signal at gate2 ride a dc voltage or not?

You say, I should not be getting square waves at the output? I am not getting any square waves at the output...

Thank you for your help. I need to finish with this mixer once and for all.

 

[vk6kro]

The AC signal on G2 should be superimposed on the DC voltage of about 2 volts. Try to optimise the level of this signal to get the best conversion gain. Ie best production of sum or difference products.

20 volts supply is probably too much. Maybe 12 volts.

The drain load should be about 1000 ohms. This will give more gain than 100 ohms.
You should aim for about half the supply voltage across the FET from drain to source.

Note that you will get an output of both input voltages (on G1 and G2) as well as the sum and difference of these.

So, you need to filter out the ones you don't want.

 

[perplexabot]

The AC signal on G2 should be superimposed on the DC voltage of about 2 volts. Try to optimise the level of this signal to get the best conversion gain. Ie best production of sum or difference products.

20 volts supply is probably too much. Maybe 12 volts.

The drain load should be about 1000 ohms. This will give more gain than 100 ohms.
You should aim for about half the supply voltage across the FET from drain to source.

Note that you will get an output of both input voltages (on G1 and G2) as well as the sum and difference of these.

So, you need to filter out the ones you don't want.

Thank you. So right as soon as I bias gate2 at 2v DC, the output seems to be losing its "modulating effect." Here is a update schematic and waveforms:

 

[vk6kro]

That model doesn't seem to be working as a mixer. Where did you get it from?

My LTSpice doesn't seem to have a BF981 model in it.

I can't read the parameters of your BF981 on my monitor, but maybe it isn't complete enough to work as a mixer?

 

[perplexabot]

That model doesn't seem to be working as a mixer. Where did you get it from?

My LTSpice doesn't seem to have a BF981 model in it.

I can't read the parameters of your BF981 on my monitor, but maybe it isn't complete enough to work as a mixer?

Here is what i got from yahoo group LTSpice:

*.SUBCKT BF981 1 2 3 4
*Drain  Gate2 Gate1 Source   

* Pin order changed in BF981 model
*   1.: SOURCE;  2.: DRAIN;  3.: GATE 2;  4.: GATE 1;
.SUBCKT BF981 4 1 2 3

*Dual Gate Mosfet
MD1 5 3 4 4 BF981A
MD2 1 2 5 4 BF981B W=50U
.MODEL BF981A NMOS (LEVEL=1 VTO=-1.1 KP=15M GAMMA=3.3U
+ PHI=.75 LAMBDA=3.75M RS=2.2 IS=12.5F PB=.8 MJ=.46
+ CBD=3.43P CBS=4.11P CGSO=240P CGDO=200P CGBO=20.5N)
.MODEL BF981B NMOS (LEVEL=1 VTO=-.9 KP=18M GAMMA=19.08U
+ PHI=.75 LAMBDA=13.75M RD=41.3 IS=12.5F PB=.8 MJ=.46
+ CBD=3.43P CBS=4.11P CGSO=240P CGDO=200P CGBO=14.5N)
* Philips
* N-Channel Depletion DG-MOSFET
.ENDS BF981

 

[vk6kro]

OK

Could you try grounding the bottom end of R7?

 

[perplexabot]

OK

Could you try grounding the bottom end of R7?

I just did that, and got the same result as the last image attached.

 

[vk6kro]

The gain of the FET should be changing with G2 voltage and this model doesn't do that.

Try this: remove everything from G2.
Connect a voltage source to G2 and vary it from 0 volts to 12 volts using the DC sweep function. This is in the Edit Simulation Cmd section

See if this has any effect on the gain of the FET.
The output sinewave should get bigger with more G2 voltage.

Where are you?

 

[perplexabot]

The gain of the FET should be changing with G2 voltage and this model doesn't do that.

Try this: remove everything from G2.
Connect a voltage source to G2 and vary it from 0 volts to 12 volts using the DC sweep function. This is in the Edit Simulation Cmd section

See if this has any effect on the gain of the FET.
The output sinewave should get bigger with more G2 voltage.

Where are you?

Hey, thank you for the input and sorry for the late reply. Here is the result of your suggestion. Interesting that it plateaus at around 9.25v. I wonder why. Here is the result:
Green: V2 sweeped
Blue: Output taken at drain of dgmos.

 

[vk6kro]

The output should be a sinewave but you would see it as varying thickness on the blue line.

Try not plotting the sweeping voltage (the green line) and zoom in on the blue trace (by varying the voltage range in the vertical scale) to see if the thickness of the line varies across the screen.

 

[perplexabot]

The output should be a sinewave but you would see it as varying thickness on the blue line.

Try not plotting the sweeping voltage (the green line) and zoom in on the blue trace (by varying the voltage range in the vertical scale) to see if the thickness of the line varies across the screen.

Hey, I don't believe it is varying in thickness. I never even knew varied thickness was something to look at in LTSpice. Here is a plot:

Thank you.

 

[vk6kro]

I tried this and I couldn't get it to work either.
The AC signals seem to get disabled in DC sweep mode.
Seemed like good idea.

I tried a trick I have used in the past.

You put a PNP transistor between the source of a FET and ground with the collector grounded and 100k from base to ground.

If you use small signal inputs, the result is spectacular, but probably just linear mixing. If you have any two signals in an amplifier, the output will just be a mix of the two but no sum or difference signals.

If you deliberately overdrive the oscillator input to the PNP transistor, you do get true mixing, and filtering produces a new sum or difference frequency.

 

[perplexabot]

I tried this and I couldn't get it to work either.
The AC signals seem to get disabled in DC sweep mode.
Seemed like good idea.

I tried a trick I have used in the past.

You put a PNP transistor between the source of a FET and ground with the collector grounded and 100k from base to ground.

If you use small signal inputs, the result is spectacular, but probably just linear mixing. If you have any two signals in an amplifier, the output will just be a mix of the two but no sum or difference signals.

If you deliberately overdrive the oscillator input to the PNP transistor, you do get true mixing, and filtering produces a new sum or difference frequency.

Sorry for my late reply and thank very much for your valuable help and your time. So it is the BF981 that is the problem (for this application)? Is it possible to use something other than the BF981 (for a sum/diff mixer) that will not require using a pnp in overdrive?

EDIT: How does one choose a dual gate mosfet as a mixer? What are the things one should consider?

Thank you.

 

[vk6kro]

I think the model may not be accurate enough to simulate mixer action.

The BF981 works very well as a mixer, so a plan would be to get one and try it.

I understand that a dual gate MOSFET can be simulated by two depletion mode FETs in series.
I haven't tried this, but if you connected the drain of one FET to the source of another in LTSpice, you might be able to get a better simulation.

Just guessing, but if you had the signal driving the second one and an oscillator driving the first one, you might get mixer behavior.

LTSpice let's you have an offset voltage on AC sources, so you could use this to set bias DC levels without having to choose resistor networks.

Choosing a dual gate FET may be mostly a matter of finding any of them at all.

Unless you want to use them at VHF, almost anything would be OK.

Where are you ?

 

[perplexabot]

I think the model may not be accurate enough to simulate mixer action.

The BF981 works very well as a mixer, so a plan would be to get one and try it.

I understand that a dual gate MOSFET can be simulated by two depletion mode FETs in series.
I haven't tried this, but if you connected the drain of one FET to the source of another in LTSpice, you might be able to get a better simulation.

Just guessing, but if you had the signal driving the second one and an oscillator driving the first one, you might get mixer behavior.

LTSpice let's you have an offset voltage on AC sources, so you could use this to set bias DC levels without having to choose resistor networks.

Choosing a dual gate FET may be mostly a matter of finding any of them at all.

Unless you want to use them at VHF, almost anything would be OK.

Where are you ?

Ok great. I will order these BF981s and play around with them. Thank you.
Where am I located? Southern California.

 

[vk6kro]

You might like to see this for some more mixer suggestions:

http://www.eham.net/ehamforum/smf/index.php?topic=88791.0

I tried simulating two 2n3819 FETs in series. It worked to some extent, but it was too difficult to be practical.