How Do You Calculate Vout and Vin in a MOSFET Push-Pull Common Drain Circuit?

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The discussion centers on calculating Vout and Vin in a MOSFET push-pull common drain circuit. The user has successfully calculated Id, Vgs, and Vds but is struggling with determining Vout min, Vout max, Vin min, and Vin max. Clarification is sought on the definition of the constant k_n and the conditions under which the transistors remain in the active region. There is a debate regarding the interpretation of the maximum output voltage calculation, with emphasis on ensuring both transistors stay active for linear operation. Overall, participants are collaborating to resolve the complexities of the assignment.
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Hi everyone,

I have this following problem (uploaded it in the pdf). I have made an attempt at solving it, but now i am just stuck.

I have done question one, and have confirmed my answers in PSpice.

my Id = 16uA, Vgs = 1.4V and Vds = 4.6V ( 3 + 8/5)
and for p-channel the values are just opposite.

My problem is that i am stuck on question 2 where i have to calculate Vout min, Vout max, Vin min, Vin max. I thought that Vout max is Vdd - Vod, but i seem to be wrong.

Any help will be very much appreciated.

Kind Regards
spikestar
 

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How is the constant k_n defined Spikestar. There are two common definitions.

Is it I_d = 0.75 (Vgs-Vt)^2 or is it I_d = 0.75/2 (Vgs-Vt)^2 for the (approx) active region equation?Re the maximum voltage. Where it says "Calculate the max output voltage assuming both transistors stay in the active region", I would read that as find the input/output voltage at the point where either the pmos goes into cutoff or the nmos into triode, whichever is lower (for the positive voltage excursion). Start by finding where the pmos goes into cutoff as that's the easier of the two cases to solve.
 
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Thinking about this a little more I find the statement "assuming both transistors stay in the active region" to be a little troubling. Taking this literally then what I suggested above is correct. However the intention might have been simply that each driving transistor remain in the active region. In other words, that the n-ch device stays in the active region during +ive excursions and that the p-ch device stay in the active region during -ive excursions.

Edit: No I think the first (literal) interpretation was correct as the circuit is approx linear if both mosfets stay in the active region at all times. I'm more used to BJT "push pull" stages where the non-driving device definitely goes into cut-off, but after considering the mosfet push-pull stage in a bit more detail I see that it does work much better if both devices stay active over the full cycle.

Skipestar. Can you workout the maximum Vi-Vo differential (for +ive Vi) before the p-ch device goes into cut off?
 
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Hi spikestar,

I'am doing the same assignment as your question, but i don't know how to do question 1, can anyone show me how to do question 1?

Thank for help.
 
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