Need help designing ADC system -

[envanyatar]

Need help designing ADC system - URGENT!

I have to design a system where an analog input is converted to a digital output which will be sent to a parallel digital data bus using a ADC chip.

the specifications are that the input should be between 300-3200Hz with a digitisation error of 1%. for this do i use a band pass filter or a low pass only? how do you maintain under 1%? is it by choosing the number of bits?

also, the sample rate is to be taken at 8kHz. but the the rates in the Chips are all very much higher than this. How do you control that?

if a basic block diagram is to be drawn, should it be like this?

analog input, filter, sample and hold, ADC, (timer?? to control the sampling rate??), (shift registers? to convert from series to parallel??), digital data bus

 

[berkeman]

What textbook are you learning about ADC systems from? A good source of information is the manufacturers who make the ADC chips. It's in their best interest to help you design a good circuit using their chips, so their Application Notes sections are usually full of great info and help.

I checked out Analog Devices website, and they have a long list of helpful Application Notes:

http://www.analog.com/en/DCcList/0,3090,760%255F%255F43,00.html

Start with a basic one like AN-282, and then look for notes that may fit your device or system requirements.