Parasitic capacitance calculation of interconnects

In summary, a user was seeking information on calculating parasitic capacitance for interconnects of power switches. They found that software such as "Maxwell" or "fastcap" could be used, but were unsure if it was possible for MOSFETs with a large number of fingers. Another user replied that parasitic capacitance can typically be ignored, except for RF MOSFETs in microwave circuits. They also suggested looking at internal capacitance specs in a data sheet and potentially adding a small resistor in the gate connection. Lastly, they mentioned that parallel wire transmission line approximations could be used to calculate lead capacitance and inductance if needed.
  • #1
eng_ema
1
0
Hi everybody,

i was working on a layout of a boost converter control
i finished it but now i am trying to calculate the parasitic capacitance of interconnects of power switches
after searching i found that i can do that with software like "Maxwell" or "fastcap"
but i don't now if it possible for MOSFET with large number of fingers

so is there anyone now about this

thanks in advance
 
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  • #2
Except for RF MOSFETs in microwave circuits you can ignore parasitic capacitance.

The interconnects will have a few pF at best. Internally the MOSFET will have capacitances measuring hundreds of pF that will be somewhat voltage dependent. Take a look at the internal capacitance specs in a data sheet. A small series resistor, (maybe 10 ohm), is sometimes added in the gate connection to prevent an ultrasonic parasitic oscillation as the MOSFET passes through the transition zone. That effectively isolates the parasitic inductance of the lead.

If you really need to, you can calculate lead capacitance and inductance using parallel wire transmission line approximations. There should be no need to model it.
 

1. What is parasitic capacitance?

Parasitic capacitance refers to the unintentional or unwanted capacitance that arises between two conductors, such as wires, when they are placed in close proximity to each other. This capacitance can have a negative impact on the performance of electronic circuits.

2. How is parasitic capacitance calculated?

Parasitic capacitance can be calculated using various methods, including analytical equations, numerical simulations, and measurements. The most common method is to use numerical simulations, such as finite element analysis, to model the interconnect structure and calculate the capacitance based on the geometry and material properties.

3. What factors affect parasitic capacitance?

The main factors that affect parasitic capacitance of interconnects include the distance between the conductors, the dielectric material between the conductors, the surface area of the conductors, and the frequency of the signal passing through the interconnect.

4. How does parasitic capacitance impact circuit performance?

Parasitic capacitance can cause a decrease in signal integrity and an increase in power consumption in electronic circuits. It can also lead to cross-talk between neighboring interconnects, which can result in signal interference and data errors.

5. How can parasitic capacitance be reduced?

There are several techniques that can be used to reduce parasitic capacitance, such as increasing the distance between the conductors, using low dielectric constant materials, minimizing the surface area of the conductors, and utilizing shielding or isolation techniques. Designers can also optimize the interconnect layout to minimize the overall parasitic capacitance.

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