Pipelining Wires: Explained for Microprocessor Architecture

[EvLer]

here's a statement "pipelining wires is an effective mechanism to overcome intrinsic wire latency" as related to the microprocessor architecture. What exactly is this "pipelining of wires"? I know what a pipeline architecture is of a processor vs let's say multicycle, but pipelining WIRES?
Could someone explain? thanks...

 

[berkeman]

Interesting. I got this hit off of google. It seems to explain the concept, but I don't have time to read it right now. Does it help?

http://www.iccd-conference.org/proceedings/2004/22310160.pdf