Problems with EE homework dealing with Octal D-FF and D Latch

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Discussion Overview

The discussion revolves around a homework problem involving timing diagrams for a D Flip Flop and a D Latch, specifically how to achieve certain values (AA for the D Flip Flop and 55 for the D Latch) through the correct manipulation of control inputs, including OEN, OE1, and OE2. The scope includes technical reasoning and conceptual clarification regarding digital logic design.

Discussion Character

  • Technical explanation
  • Conceptual clarification
  • Homework-related

Main Points Raised

  • One participant expresses confusion about the purpose of OEN and how to store data in the D Flip Flop and D Latch.
  • Another participant suggests that OEN can be kept enabled for the problem since the outputs are connected 1-to-1, indicating that controlling OEN is unnecessary in this case.
  • A participant proposes multiple methods to manage OEN and G, questioning whether OEN should be 1 or 0, given its active-low nature.
  • Clarification is provided regarding the active-low input of the chip schematic, indicating that both OE1 and OE2 should be driven low to enable their outputs.

Areas of Agreement / Disagreement

Participants express uncertainty about the correct settings for OE1 and OE2, as well as the handling of OEN and G. Multiple approaches are proposed, but no consensus is reached on the best method to achieve the desired outcomes.

Contextual Notes

Participants note the active-low nature of OEN and the implications for the control signals, but the discussion does not resolve how these signals should be configured in the context of the problem.

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Homework Statement


Show the timing diagrams of the input bus and control inputs so the D Flip Flop has the value AA and the D-Latch has the value 55.
[PLAIN]http://img89.imageshack.us/img89/5047/babykg.jpg

The timing diagram consists of all the inputs, OE1, WR1, OE2, and WR2.

Homework Equations


NONE

The Attempt at a Solution


I mainly don't understand the purpose of OEN. I know that the latch will output the input when G is 1, and the flip flop will output on rising edge, but I honestly do not know how to store the data. I know that I must first load 55 into the flip flop, then pass that to the latch and then load in the AA but I am unsure how to actually load the information in. I assume it deals with OEN but I have not found a good explanation for that.
 
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s w said:

Homework Statement


Show the timing diagrams of the input bus and control inputs so the D Flip Flop has the value AA and the D-Latch has the value 55.
[PLAIN]http://img89.imageshack.us/img89/5047/babykg.jpg

The timing diagram consists of all the inputs, OE1, WR1, OE2, and WR2.

Homework Equations


NONE

The Attempt at a Solution


I mainly don't understand the purpose of OEN. I know that the latch will output the input when G is 1, and the flip flop will output on rising edge, but I honestly do not know how to store the data. I know that I must first load 55 into the flip flop, then pass that to the latch and then load in the AA but I am unsure how to actually load the information in. I assume it deals with OEN but I have not found a good explanation for that.

OEN is just the Output Enable. From the description of the problem, I would think you could keep the outputs enabled all the time for this problem. If you had two chips' outputs connected together, both feeding into one other chip's inputs, then you would need to control the OEN inputs of the two chips to keep them from fighting each other on their outputs. But as this circuit is just connected 1-to-1, I think you can just keep the OENs asserted.
 
Last edited by a moderator:
Thanks for the reply. I think I figured out multiple ways to do it actually. Like you said, I could keep OEN at 0 all the time, well actually in this case wouldn't it be '1' since there is the not on the OEN?? Well, if I kept OEN enabled then I would just set G to 0 once it has the 55 loaded into it. Or I could keep G at 1 and then change the OEN1 to disabled once the 55 is loaded into the latch. Is this correct?

Actually I really want to know is, should OE1 and OE2 be 1 or 0 for this problem, given the 'not'.
 
s w said:
Thanks for the reply. I think I figured out multiple ways to do it actually. Like you said, I could keep OEN at 0 all the time, well actually in this case wouldn't it be '1' since there is the not on the OEN?? Well, if I kept OEN enabled then I would just set G to 0 once it has the 55 loaded into it. Or I could keep G at 1 and then change the OEN1 to disabled once the 55 is loaded into the latch. Is this correct?

Actually I really want to know is, should OE1 and OE2 be 1 or 0 for this problem, given the 'not'.

The circle at the input of the chip schematic figure means that the input is active low, so drive both low to enable their outputs.
 

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