Pull Up Resistor Value Impact on I2C Signal Frequency

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Discussion Overview

The discussion revolves around the impact of pull-up resistor values on the signal frequency in I2C communication. Participants explore the theoretical and practical implications of resistor values, capacitance, and signal behavior in simulations and real-world applications.

Discussion Character

  • Technical explanation
  • Debate/contested
  • Experimental/applied

Main Points Raised

  • Some participants assert that pull-up resistor values and device capacitance limit the rise time of I2C signals, thereby affecting maximum frequency.
  • Others argue that the voltage source used in simulations is an ideal mathematical function that does not account for real-world capacitance or impedance, suggesting that a realistic oscillator should be used instead.
  • There is a discussion about the placement of capacitance, with some suggesting that parasitic capacitance should be in series with the pull-up resistor, affecting the charging time.
  • One participant emphasizes the need for a realistic output impedance for the voltage source, particularly in open-collector configurations, to accurately simulate I2C behavior.
  • Concerns are raised about the use of a high-value pull-up resistor (470k), with suggestions that typical values for I2C are around 1k to 22k, depending on the bus configuration.

Areas of Agreement / Disagreement

Participants express differing views on the effects of pull-up resistor values and the nature of the voltage source in simulations. There is no consensus on the best approach to simulate I2C behavior accurately, and multiple competing perspectives remain.

Contextual Notes

Limitations include the assumption that the voltage source can be treated as ideal, which may not reflect real-world conditions. The discussion also highlights the dependency on specific configurations and the need for realistic modeling in simulations.

likephysics
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In any signal line that's oscillating, how does the pull up resistor value affect the signal frequency.
According to I2C specs, The pullup res and the device capacitance limit the rise time of the signal, thus limiting the max frequency.
But when I simulated, I didn't see any change in frequency when I varied the value of R.
In the circuit attached, V1 is the oscillating source(1MHz), R is tied to V2(3.3V)
 

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V1 is just a mathematical function that produces a waveform at a specified amplitude and frequency. It has no internal capacitance nor can it be affected by external components.

Try creating a real oscillator using a transistor and see what happens.
 
Why is the cap to ground? I think the parasitic capacitance should be in series with the pullup. You'll need to charge this capacitance through the pullup and that's what's going to slow you down.
 
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likephysics said:
IThe pullup res and the device capacitance limit the rise time of the signal, thus limiting the max frequency.
You need to give your voltage source, V1, a realistic output impedance. If the source is an open-collector arrangement, then its output impedance should be represented as a very high value for output going HI.
 
gnurf said:
Why is the cap to ground? I think the parasitic capacitance should be in series with the pullup. You'll need to charge this capacitance through the pullup and that's what's going to slow you down.

The cap to ground represents the IC input capacitance.
 
skeptic2 said:
V1 is just a mathematical function that produces a waveform at a specified amplitude and frequency. It has no internal capacitance nor can it be affected by external components.

Try creating a real oscillator using a transistor and see what happens.

I can add series resistance and some parallel capacitance for V1. If I add series resistance, then the series res and parallel cap of 10pf will act as low pass filter.
But I am interested in seeing how the pullup res and 10pf cap degrade the signal.
 
Your V1 is just a mathematical function that outputs a specific waveform at a specific amplitude and frequency. Adding external components will not affect its frequency. You need to create an oscillator in place of V1.
 
OP, you are not using a load, and like Skeptic2 said, you are not using a realistic output driver either. Its an open collector, so that means, when the output should be high, your pin should be floating (to be pulled up by the resistor). Instead, you are driving the high output directly with a voltage source in your simulation. The voltage source can source/sink infinite current since it exists only as an ideal mathematical model. That ideal voltage source has no problem removing and adding charge to the capacitor, which results in that pull up resistor basically being ignored.

Try using a diode in series, between your voltage signal source and your RC circuit, to imitate the open-collector behavior (cathode at the + side of your voltage source, anode at the RC). Using an NPN open collector would be even more accurate, especially when you are trying to discharge the capacitor with a low output. Just using a high value resistor in series will not give you accurate results, although more realistic than what you were simulating originally.

Also, as a side comment, I think generally I2C is recommended to use 1k pull-ups, and probably never much higher than 22k. It depends on the current sinking abilities of your chip and how many devices you have on the bus. Why are you using a 470k pull up?
 
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