Nexor
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How does a NOT gate works in a genuine circuit? Like in a calculator?
Thanks in advance,
Nexor.
Thanks in advance,
Nexor.
The discussion revolves around the functioning of a NOT gate in real-life circuits, particularly in devices like calculators. Participants explore the theoretical and practical aspects of how NOT gates operate, including their implementation using transistors and the implications of signal inversion.
Participants generally agree on the basic function of NOT gates, but there are multiple competing views regarding the specifics of their implementation and the humorous concepts introduced. The discussion remains unresolved on the latter topics, as they are largely treated as jokes.
Some participants' contributions include speculative or humorous elements that may not directly relate to the technical functioning of NOT gates, leading to potential confusion for those focused solely on the original question.
Readers interested in digital logic design, circuit implementation, and the cultural aspects of engineering humor may find this discussion engaging.
Consider a single transistor in common-emitter configuration. When you put high on the base, transistor opens and pulls down voltage on the collector to 0. When you put low on the base, the resistor between collector and vcc pulls the voltage up to vcc.Nexor said:But how would it work? I mean, a line powered with 1V with a inverter (or NOT gate) in it's path would turn the signal to it's opposite value, which might be 0V, am I right? But how this same inverter would turn 0V into 1V?
Dmytry said:Consider a single transistor in common-emitter configuration. When you put high on the base, transistor opens and pulls down voltage on the collector to 0. When you put low on the base, the resistor between collector and vcc pulls the voltage up to vcc.
The real world circuit in a calculator probably uses two MOS transistors:
http://www.allaboutcircuits.com/vol_4/chpt_3/7.html
where the low signal opens the top transistor and results in high signal on output, and high signal opens the bottom transistor and results in low signal on the output (during transition, very briefly, both transistors are open)
1) I think you are referring to the false gate, which will output 0 (false) no matter the input.yungman said:Now that you have your answer, I have two more for you!
1) What is a none gate?....A gate that can accept all logic levels, no propagation delay, when you put in a 1, you get 0, if you put in a 0, you get 0.!
2) What is a WOR...Write Only RAM?!......A RAM that have infinite storage locations, you can use any logic levels, you can write as fast as possible.
And yes, I invented these two!
Is this out of line even for Christmas Eve?![]()
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My big party is tomorrow, I just spent the whole day cooking and setting up the place. Getting a little wacky even with no alcohol!
Merry Christmas
Alan
yungman said:I did not know that, that was before my time!
Nexor said:1) I think you are referring to the false gate, which will output 0 (false) no matter the input.
2) Whaaat??
yungman said:Then call it your invention!
Merry Christmas.
yungman said:You mean the write only memory? As Jim called it WOM, you can write anything in, but can never read it back!
Nexor said:How would it work? Plus, how can it be used?
Nexor said:How would it work? Plus, how can it be used?
Nexor said:You all can't do that with me, I'm just a newbie! XD
yungman said:We don't mean to confuse you. I thought you have your question answered already before I even came in for some Christmas joke! This post just took on a new life from that onward and has nothing to do with you, just a few old timers' joke!