Ring Oscillator: Learn How It Self-Oscillates & Where Its Energy Comes From

[Jdo300]

Hello All,

I was talking to one of my EE friends and they were telling me about this thing called a ring oscillator which could oscillate by itself simply by connecting a bunch of diodes in a loop. I was just wondering if someone could give me more information about this. I'm specifically interested in knowing how these things can oscillate on their own, what causes the oscillations, and where is the energy coming from?

Thanks,
Jason O

 

[chroot]

A ring oscillator is a bunch of inverters arranged in a ring, the output of one going to the input of the next.

An inverter is a logic device which very rapidly changes output states (from logic zero to logic one, for example) when its input crosses a threshold.

When the circuit starts up, all of the nodes are at zero volts. This causes the PMOS transistors in all the inverters to begin conducting from VDD to the output. Eventually, one of the devices wins the race, and successfully switches the next inverter to the opposite state. This state change then ripples through each inverter, around and around the loop. Each inverter has some finite delay through it, so the number of inverters (and their intrinsic delays) can be used to find the period of oscillation.

As with all circuits, the only energy moved around in the circuit is that which comes from the power supplies.

- Warren

 

[varwnos]

Guys i need help about ring oscillator.One use of R.O. is to measure capacitors.I have build an R.O. in one FPGA knows anyone what is the range of capacitance measure? I must measure 4-5pF with 0.1pF at least resolution!

 

[berkeman]

Sounds like you would put an output R on one inverter, and the capacitor on the input of the next inverter. You'd need to chose the R to give you some frequency variation, and calibrate the setup with accurate known capacitances. Keep in mind that the inverter input has some capacitance as well, but as long as you make a calibration curve, that won't matter.

You should also do an error analysis, starting from your frequency measurement error, in order to see whether 0.1pF resolution (and accuracy) is attainable.

Quiz question -- where should you measure the frequency of the ring oscillator in this setup?

 

[varwnos]

Ok look.I have create a 100 stages inverters and one AND gate with two inputs ,so i have a 101 stage R.O with on/off from an external input on a pin of the fpga.For example 23 pin. If i put a capacitor in this pin 200nF between this pin and GND the oscillation of R.O. it wil be slower... true?? also i have a counter who counts one period of this oscillation starts with the positive edge stops with the negative edge.The result goes to a register and after in rs232 in my pc.The all project have 256 capacitors! 16x16 and in my pc at the end of analysis i must see in a GUI a photo 16x16 pixels.This 16x16 device is VLSI device not very large just an IC.BUT i don't know if the variable capacitor 4-5pF can change dramatically the period ,,to measure it!

 

[berkeman]

Why in the world would you make a 100 stage ring oscillator? AFAIK, that makes no sense. Quiz question -- why not?

 

[varwnos]

OK.Listen if you make an R.O. with 11 stages of inverters you will have a 3.4GHz oscillation! Not possible in FPGA... more inverters less frequency oscillation.Understand it?

 

[berkeman]

OK.Listen if you make an R.O. with 11 stages of inverters you will have a 3.4GHz oscillation! Not possible in FPGA... more inverters less frequency oscillation.Understand it?

The tone of your reply is a bit aggressive for our usual forum tone here on the PF, but I'll just say that if you do it all on-chip, then you are probably correct. But if you make a ring oscillaor out of dumpy discrete inverters with more like a 5ns tpd, then it takes fewer stages to get down to reasonable frequencies.

It seems like a better solution would be to just used a fixed RC stage at one tap of the ring oscillator to slow things down, and then put your RC with the variable C at another tap. Good luck.

 

[desA]

Has anyone tried to simulate this phenomenon using Simulink, or similar? I'd be very interested in seeing what emerges as various parameters are tweeked.

Very interesting problem.

desA

 

[varwnos]

I am really sorry about my tone.As you can see i can't speak good english.I am sorry Berkeman and other the users and thank you for helping me.I will try try to wright more kindly.
Berkeman: You are true about the use of RC but i must make the project only with FPGA and th SENSOR of 16x16 capacitor.I know this is real truble!

DesA i have make simulations over ORCAD (schematics) with big inverters MOSFETs and i mave make simulations over MICROWIND (VLSI) i have make my little MOS and it works fine with variable capacitors the frequency changes very mych, but when a company creates your mask of inverters in waffer as INTEL She put before the pins BUFFERs and this is a problem again.