Solve 555 Timer Problem - Get 100kHz & 95% Duty Cycle

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Discussion Overview

The discussion revolves around a problem with achieving a desired frequency and duty cycle using a 555 timer in astable mode. Participants explore the calculations and components involved in the design, specifically targeting a frequency of 100kHz and a duty cycle of 95%.

Discussion Character

  • Technical explanation
  • Debate/contested
  • Experimental/applied

Main Points Raised

  • The original poster (OP) calculated component values for the 555 timer but achieved a frequency of 48kHz and a duty cycle of 93.5% instead of the desired 100kHz and 95% duty cycle.
  • Some participants suggest that the capacitor value of 1nF may be too small, potentially affecting accuracy due to stray and gate capacitance, recommending a redesign with at least 10nF.
  • The OP tested with larger capacitors (10nF and 100nF) but still only achieved 40kHz and noted discrepancies between calculations and simulation results in Multisim.
  • The OP later reported that the issue was resolved by replacing a damaged IC, which allowed them to achieve the desired frequency and duty cycle.

Areas of Agreement / Disagreement

Participants do not reach a consensus on the initial cause of the frequency discrepancy, as the OP's calculations and simulations initially suggested different outcomes. However, the OP ultimately resolves the issue through hardware changes.

Contextual Notes

The discussion highlights potential limitations in simulation accuracy and the impact of component condition on circuit performance. The OP's initial calculations and the effects of component values remain unresolved in terms of their influence on the final output.

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[SOLVED] help 555 timer problem

hi all, i am designing a 555 on astable mode. it is designed to operate at 100kHz with a duty cycle of 95% ( and i get 48Khz and duty cycle 93.5%).

i calculated all the values necessary:

Ra = 12.987 kOhm
Rb = 721.5 Ohm
C = 1nF
F = 1.44/ ((Ra + 2Rb)*C)


i used thes formulas :

tH = 0.693*(Ra + Rb)*C
tL = 0.693*(Rb)*C

T = tH + tL


i searched everywhere and found out the max frequency is 500Khz so I am not sure where the problem is...i need the 100kHz because i am designing an infrared modulator and the central frequency for my filters is 100kHz


can anyone help me thanks.
 
Last edited:
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1nF is a bit small, capacitors this small aren't very accurate and the effects of stray and gate capacitance start to matter, you might want to redesign it with at least 10nF.
 
just tested with 10n and 100n ...got 40Khz this time...ive double checked everthing.


i just simulated it on multisim and i got 45.9kHz ...but by my calculations it should be 100kHz

any ideias? i think this is very odd
 
Last edited:
--SOLVED--

the multsim 555 design wizard is not correct. there is a problem with it... in the lab i changed the IC (it was a bit damaged) and i managed to adjust it to my desired frequency / dutycycle.

btw... thanks for trying to solve my problem
 

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