SPDT switches in CMOS processes.

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    Cmos Switches
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Discussion Overview

The discussion revolves around the design of a Single Pole Double Throw (SPDT) switch in CMOS processes, focusing on circuit optimization and the implications of different switching requirements. Participants explore various circuit configurations and their suitability for specific applications.

Discussion Character

  • Technical explanation
  • Debate/contested

Main Points Raised

  • One participant presents a design using two transmission gates and a MOS inverter, questioning its optimality due to parasitics from the switches.
  • Another participant argues that the presented design is optimal for bi-directional switching between VDD and VSS, suggesting that different requirements may allow for simpler configurations.
  • A subsequent reply acknowledges the validity of the second participant's point but raises concerns about signal swings from ground to VDD, implying a need for a potentially better approach.
  • Another participant emphasizes that the optimal solution depends on the specific application and requests a schematic for further clarification.

Areas of Agreement / Disagreement

Participants express differing views on the optimal design for the SPDT switch, indicating that multiple competing approaches may be valid depending on the specific requirements of the application. The discussion remains unresolved regarding the best circuit configuration.

Contextual Notes

The discussion highlights the importance of understanding specific switching requirements and the potential impact of circuit design choices on performance, but lacks detailed schematics or examples to clarify the proposed solutions.

Lanot
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Hi guys,

Recently I had to design a SPDT switch for a project, which I was able to design using the trivial circuit with 2 transmission gates and 1 MOS inverter, like this: http://www.semicon.toshiba.co.jp/eng/product/new_products/logic/1326183_37648.html

I think that this circuit is not optimal, since it introduces the parasitics from two switches.
The question is: Is there a better circuit to do this?

Thank you.
 
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That is optimal if you want bi-directional switching of arbitrary signals between VDD and VSS.

If you switching requirements are different, you may get away with two fets. For example if all you want to do is ground 1 line or the other you can use 2 N channel FETs to ground. etc etc etc

It depends on exactly you are trying to do.
 
Yes, you are correct.
The signal in question may swing from ground to vdd though. So isn't there a better approach?
 
Again, it depends on exactly what you are doing. A schematic would help.
 

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