State Machine Design for Repeating Sequence: 0,2,4,6,1,3,5,7 with 4 Bit Counter

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SUMMARY

The discussion focuses on designing a state machine that cycles through the sequence 0, 2, 4, 6 three times followed by 1, 3, 5, 7 two times using a 4-bit counter. The user encountered issues with overlapping sequences when transitioning between the two sets. They proposed using a second state machine to manage the input, which rotates through five states (0, 0, 0, 1, 1) to resolve the problem. The solution effectively addresses the challenge of maintaining the correct sequence without overlap.

PREREQUISITES
  • Understanding of state machine design principles
  • Familiarity with 4-bit counter operation
  • Knowledge of truth tables for state transitions
  • Basic concepts of sequential logic circuits
NEXT STEPS
  • Research state machine design using VHDL or Verilog
  • Learn about designing truth tables for complex state transitions
  • Explore the implementation of multi-state counters in digital circuits
  • Investigate the use of microcontrollers for state machine applications
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Electrical engineers, computer scientists, and students studying digital logic design who are interested in state machine implementation and troubleshooting sequence generation issues.

Rocket254
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Homework Statement



Design a state machine that repeatedly goes through the following sequence: three repeats of 0,2,4,6 followed by 2 repeats of 1,3,5,7. An observer watching the machine should see the states over and over: 0,2,4,6,0,2,4,6,0,2,4,6,1,3,5,7,1,3,5,7...


The Attempt at a Solution

I've decided to use a 4 bit counter as the input to the machine. I have set up the following truth tables:EDIT: it is chewing my formatting to pieces. The values on a line by themselves are the counter values.Counter current state next state

00
000 010
001 011
010 100
011 101
100 110
101 111
110 000
111 000
01
000 010
001
010 100
011
100 110
101
110 000
111
10
000 010
001
010 100
011
100 110
101
110 001
111
11
000
001 011
010
011 101
100
101 111
110
111 001
I seem to run into a problem after the first complete 3-2 sequence.(Thus why the truth table isn't completed.) When the counter is at 00, 01, and 10, the sequence is at 0246. It then swaps to the 1357 sequence at counter values 11 and 00. After that, instead of counting three more 0246 sequences, it swaps back to 1357 at the end of counter value 10. This problem would be simple if the sequences alternated every 4 times but, my machine seems to overlap itself when the counter runs back through the values. Any ideas how to correct the problem?
 
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I may have found an alternate way to solve this. Does anyone know if there is a way to make a 3 bit counter stop at 5 and start back over at 1?
 
Do you have to use a counter? It seems this would be a very easy problem with a simple microprocessor.
 
Didn't see the reply in time but I solved it anyway. I decided to use a second state machine for the input that rotated through 5 states of 0,0,0,1,1


Thanks for the help.


JH
 

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