Susceptibility of low current circuits - OpAmp solution?

[TheAnalogKid83]

I have what seems like a simple problem. I was asked to use a simple resistor divider as a scaling circuit into an A/D converter. My problem is that I have a low steady-state current requirement, and so I needed to increase the resistor values. I was told this is not an option because it causes the circuit to be susceptible for EMC. I don't want to exceed 100uA, and preferably would be down to about 10uA in my current draw for this scaler. The only idea I've been able to think of as a replacement design is to use some op amp stages, hoping I can get away with larger resistor values in the -R2/R1 gain divider since the opamp is an active device. Is this foolish to think an opamp would help cut down the current draw without being more susceptible? I'll be doing spice simulations and circuit analysis, but I'm not sure how to calculate for and simulate electromagnetic interference (assume a noise signal superimposed on my input signal? but its not just on the input signal, its being applied to the entire circuit). Does anyone know much about this?

 

[TheAnalogKid83]

Also, assuming I cut down the majority of my current with the input resistor at a high value, then will most of my next largest current losses be with bias currents of the opamp and power dissipation of the opamp? In that case, if I use an opamp designed for low power applications, will I be able to pull this off?

 

[berkeman]

It's hard to understand the requirements without seeing a full problem statement. You also need to be more explicit about what you mean by "susceptible for EMC". Do you mean capacitively-coupled noise getting into the signal traces and components? Or do you mean RF noise picked up by your sensor before the divider (and hence the need to filter with some cutoff frequency before the ADC)?

From what little I can tell so far (what is the sensor / source of the voltage, and what is its Zout?), I'd be inclined to buffer the input signal with an opamp, and drive the high-value resistor divider, and be careful about guarding and shielding that high impedance divider to minimize the pickup voltage from capacitively-coupled noise...

 

[TheAnalogKid83]

It's hard to understand the requirements without seeing a full problem statement. You also need to be more explicit about what you mean by "susceptible for EMC". Do you mean capacitively-coupled noise getting into the signal traces and components? Or do you mean RF noise picked up by your sensor before the divider (and hence the need to filter with some cutoff frequency before the ADC)?

From what little I can tell so far (what is the sensor / source of the voltage, and what is its Zout?), I'd be inclined to buffer the input signal with an opamp, and drive the high-value resistor divider, and be careful about guarding and shielding that high impedance divider to minimize the pickup voltage from capacitively-coupled noise...

The source DC voltage has an output impedance of about 3-4 ohms (its a 12V battery). The ADC sensor has an impedance of nominal 5k ohms in series with its own high impedance buffer (doesn't say in spec, but assuming megaohms), so I consider it a high impedance input. The sensor requires the the source impedance to its input to be less than the max of 10k ohms, with no minimum requirement, which was another obstacle for raising the original resistor divider values as its thevenin resistance increases also.

I was just told by a senior engineer that it would be susceptible to noise. I know we want to avoid susceptibility to both capacitively-coupled noise of the electronics and to RF that would get to the scaler through the input signal primarily. But if I know that a ferrite and special layout won't cut it to get to use the circuit.

I was hoping to use a buffer amp, and then a gain amp (gain = 0.1) with high valued resistors and enough capacitance to avoid nose problems. This is a DC battery signal, and I don't see the ADC sampling the voltage at a very fast rate, so I'm a little confused as to why my senior engineer is concerned about this susceptibility to begin with (I know he is trying to kill the ADC feature from our design requirement, but I want to try to give him reasons not to)

 

[berkeman]

Heck, if it's a DC signal, just use the high-valued resistor divider and put a cap at the ADC input to give you a 0.1Hz LPF or so. So this is just a battery voltage detect circuit?

 

[TheAnalogKid83]

Heck, if it's a DC signal, just use the high-valued resistor divider and put a cap at the ADC input to give you a 0.1Hz LPF or so. So this is just a battery voltage detect circuit?

Yes, you're right. And that is what the resistor divider circuit had at the start, a LPF cap. I'm not old enough to have gone through EMC testing with a product yet, and I'm not sure how critical it is for the system to read this voltage value reliably, but in my opinion I can't see the ADC reading the voltage incorrectly as a huge issue, ESPECIALLY because the ADC is on a microcontroller, so the software should be able to soft filter and intelligently determine if the voltage reading is abnormal or if it is a valid reading. Apparently, using high valued resistors are not liked in the industry I work in as the circuits are susceptible with high impedances (this makes sense in a lot of situations, but I'm not sure of the validity in this specific situation)