In a circuit like that you want Vce to be as low as possible. That means you should run in saturation. Notice that in the high hFE specs there is significant Vce.
In the spec for Vce(sat), notice two things. Vce is very low, and Beta is assumed to be 10. Whenever you want to use a transistor as a switch, you assume a Beta of 10. That is, you overdrive the base to get Vce as low as possible. That reduces dissipation in the transistor, and maximizes the voltage across the load.
All transistor specifications quote Vcs(sat) at a forced beta of 10.
If you need low base current, you should change to a PMOS power fet. It will have 0 gate current (except when switching) and lower Vds(on).