Dismiss Notice
Join Physics Forums Today!
The friendliest, high quality science and math community on the planet! Everyone who loves science is here!

Using GCC to generate makefile dependencies.

  1. Jan 3, 2012 #1
    How do I use GCC to generate dependencies for makefiles? I tried using the -M option, like below, but I don't know how to insert the name of the .cpp into the shell command that calls GCC with the -M option.

    Code (Text):
    %.cpp : $(shell gcc -M $<)
    Instead of the desired effect, $< is replaced by nothing, causing GCC to generate an error and my attempt to generate dependencies to fail.
  2. jcsd
  3. Jan 16, 2012 #2


    User Avatar

    I had the same problem that you do now. For that I did some googling around and found a set of tools called Autotools. Here is a pretty good explanation of what you might want to do:


    This requires some effort to setup correctly (depends on the complexity of your compilation environment), so if you have only a small number of libraries, hard-coding would be a better option.

    What operating system are you using? What libraries are you trying to use?
Share this great discussion with others via Reddit, Google+, Twitter, or Facebook