# [VHDL] Xilinx Multi-source error

Staff Emeritus
Code:
ERROR:Xst:528 - Multi-source in Unit <codec> on signal <OP>
Sources are:
Output signal of FDC instance <compression/OP>
Output signal of FDC instance <decompression/OP>

There are tristate buffers at the outputs of both the compression and decompression modules. Therefore if the compression is outputing, the decompression will be high impedance and vice versa. The problem is that Xilinx doesn't like how i'm doing it. How can I go about connecting the two outputs together?