VLSI Test Circuit: Fault Models & Examples Explained

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Discussion Overview

The discussion revolves around VLSI testing, specifically focusing on fault models and test circuits. Participants seek clarification on the relationship between these concepts and explore examples of test circuits used in VLSI testing methodologies.

Discussion Character

  • Exploratory, Technical explanation, Conceptual clarification

Main Points Raised

  • One participant expresses confusion about whether fault models and test circuits are the same or different, indicating a need for clarification.
  • Another participant shares a presentation link that outlines various fault models and testing methodologies, such as Built-In Self-Test (BIST) and boundary scan.
  • A participant describes a process where a test circuit is created to inject a fault, such as an input being stuck at zero, and explains how this is used to determine if the circuit under test fails based on the output signal.

Areas of Agreement / Disagreement

Participants do not appear to reach a consensus on the relationship between fault models and test circuits, and the discussion remains unresolved regarding this distinction.

Contextual Notes

Some participants reference specific slides from the shared presentation, but the understanding of fault models and test circuits remains unclear, indicating potential limitations in definitions and assumptions.

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VLSI testing is process that is used to determine that chip is good or faulty

VLSI chip is tested by test equipment and some test circuit

can anybody tell me the example of some test circuit

actually I am confused I don't understand that fault model and test circuit are different or same things
 
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jedishrfu said:
here's a presentation of VLSI test that may clarify some of your points:

http://www.ece.uc.edu/~wjone/intro.pdf

It shows various type of fault models, and testing methodology like BIST or boundary scan...

I have read that pdf
actually I am confused I don't understand that fault model and test circuit are different or same things
 
From my understanding, you create a test circuit (slide 8) and from that you inject a simple fault like what if the A input is stuck at zero then you apply an input signal and get a resultant output signal from your model.

When you apply the above input signal to the real circuit under test and you get the output signal above then you know it failed with the fault of the A input being stuck and in essence using the output to characterize the circuit's operation and identify its fault.
 

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