Why Does Id Increase with Constant Vgs Despite Body Effect?

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Discussion Overview

The discussion revolves around the behavior of drain current (Id) in an NMOS transistor as the source-to-body voltage (Vsb) increases while the gate-to-source voltage (Vgs) remains constant. Participants explore the implications of the body effect on threshold voltage (Vt) and its impact on Id.

Discussion Character

  • Debate/contested

Main Points Raised

  • Salil questions the relationship between Id and Vsb, suggesting that Id should decrease as Vt increases with increasing Vsb, given that Id is proportional to (Vgs - Vt)².
  • Another participant asserts that Salil's notes are incorrect, expressing the expectation that Id would decrease with increasing Vsb for a fixed Vgs, assuming the transistor limits the drain current.
  • A third participant proposes a method to verify the relationship, stating that if Vgs is fixed, increasing Vsb can raise Vt above Vgs, resulting in Id becoming zero, which supports the idea that increasing Vsb reduces Id.
  • Salil expresses gratitude for the confirmation of his understanding, indicating a degree of acceptance of the counterarguments presented.

Areas of Agreement / Disagreement

Participants generally disagree on the relationship between Id and Vsb under the given conditions, with multiple competing views on how the body effect influences Id.

Contextual Notes

The discussion does not resolve the underlying assumptions about the operational conditions of the NMOS transistor or the mathematical model used to analyze Id.

salil87
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I found on my notes that for an NMOS with increase in Vsb voltage Body Effect increases, Vt also increases. But it is mentioned that with Vgs constant id increases which I feel is wrong since id is proportional to (Vgs - Vt)2. Hence I think id should decrease. Please show me the light :-)

Thanks
Salil
 
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I think your notes are wrong. I would also expect Id to decrease with increasing Vsb for a fixed Vgs and assuming the transistor is limiting factor for the drain current.
 
Actually, I just thought of a quick way of mentally verifying this. Since Vgs is fixed, you can solve for the Vsb to make Vth above Vgs. This would make Id zero as the FET would be off. Since you can always increase Vsb to make Id=0 by increasing Vth for any fixed Vgs (in the mathematical model anyway) you should conclude increasing Vsb reduces Id.
 
Great... thnks a lot for the confirmation :-)
 

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