Why Is the Voltage on Both Capacitors 12 Volts in This Circuit?

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SUMMARY

The discussion centers on the behavior of capacitors in a circuit with a resistor, specifically addressing why both capacitors maintain a voltage of 12 volts at time t<0. The key point established is that if the circuit has been connected for a sufficient duration, the current through the resistor becomes zero, resulting in no voltage drop across it. Consequently, both capacitors retain the full voltage of the source, which is 12 volts.

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  • Knowledge of Ohm's Law and voltage drop across resistors
  • Familiarity with time constants in RC circuits
  • Basic principles of circuit analysis
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  • Study the concept of steady-state conditions in RC circuits
  • Learn about the time constant (τ) in capacitor-resistor circuits
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nhrock3
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http://i48.tinypic.com/1o4ow9.jpg

why in this circuit they say that in t<0
the voltage on both capacitators is 12 volts??

if both points of each capacitators is connected to the voltage source directy
then 12 volts is ok.

but here we have a resistor between them
this resistor drops the original voltage
it cannot be 12
 
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nhrock3 said:
http://i48.tinypic.com/1o4ow9.jpg

why in this circuit they say that in t<0
the voltage on both capacitators is 12 volts??

if both points of each capacitators is connected to the voltage source directy
then 12 volts is ok.

but here we have a resistor between them
this resistor drops the original voltage
it cannot be 12

If there is no current through a resistor, what is the voltage drop?

The current through the resistors has decayed off to zero, if the circuit has been connected up like that for a long time before t=0. Make sense?
 
thanks :)
 

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