Tri-state logic: High impedance as an input to a logic gate

In summary, the conversation discusses the effects of using a high-impedance value as an input to a logic gate. It is mentioned that this can cause errors and noise, and can result in the gate output going into a conducting state, increasing current consumption. It is generally recommended to either tie off floating inputs with a resistor or configure them as outputs. The specific effects may also depend on the type of chip being used.
  • #1
Bipolarity
776
2
So I am well familiar with how bi-state logic (with 0s and 1s) works in gates. 0+0=0; 0+1=1+0=1+1=1 etc.

What happens if an input to a gate is neither 0 nor 1, but has an high-impedance value? Will it disable the logic gate from working? Will the logic gate simply ignore that input? Anyone have any clues? Perhaps it depends on what series chip one is using?

Really appreciate it! Thanks!

BiP
 
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  • #2
Perhaps it depends on what series chip one is using?

yes.

Look at a TTL chip schematic. It pulls its input high through a resistor on base, emitter goes to input pin..
One asserts input by sinking I think 1.6ma of emitter current.
So it'll probably interpret open circuit as logic high.
Trouble is, an open inputs is susceptible to noise - the pcb track connected to it is an antenna so you get errors.
Floating inputs are troublemakers.
 
  • #3
As Jim says, floating logic inputs are a bad thing. In addition to picking up noise and possibly oscillating, when the input to a CMOS gate floats near the middle voltage between Vdd and Vss, the gate output circuit can go into a conducting state, where both the pullup and pulldown transistors are ON. That increases the current consumption of the logic gate by quite a bit.

So the design rule is generally that you do not want to leave any logic inputs floating. Either tie them off with a pullup or pulldown resistor, or configure them as outputs (like the IOs of a microcontroller).
 

FAQ: Tri-state logic: High impedance as an input to a logic gate

1. What is tri-state logic?

Tri-state logic is a type of logic that allows a third state, known as high impedance or "Z", in addition to the traditional logic states of 0 and 1. This third state is used to represent an input that is disconnected or not actively driven.

2. How does high impedance work as an input to a logic gate?

When a logic gate receives a high impedance input, it essentially "ignores" that input and does not affect the output. This allows for multiple inputs to be connected to a single output without causing conflicts or short circuits.

3. What are the benefits of using tri-state logic?

Tri-state logic allows for more efficient use of circuitry and reduces the number of required components. It also allows for greater flexibility in circuit design as multiple inputs can be connected to a single output without causing conflicts.

4. What are some common applications of tri-state logic?

Tri-state logic is commonly used in digital systems that require bidirectional communication, such as buses in computer systems. It is also used in microcontrollers, memory devices, and other electronic devices that require multiple inputs and outputs.

5. Are there any limitations or drawbacks to using tri-state logic?

One limitation of tri-state logic is that it can increase the complexity of circuit design, as it requires additional control signals to enable and disable the high impedance state. Additionally, care must be taken to ensure that the high impedance inputs do not stay in that state for too long, as it can cause issues with signal integrity.

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