Bad Circuits - Test Your Knowledge

[berkeman]

Bad Circuits -- Test Your Knowledge

We were having a discussion in a different thread about the fun sections at the end of each chapter in "The Art of Electronics" by Horowitz and Hill, where they show simple schematics as examples of Bad Circuits, without any explanation of what is bad or wrong about them.

It was mentioned in that thread that sometimes it can be hard for students learning about circuits to determine what exactly is "bad" about the circuits shown, so this thread is meant to provide a place where we can discuss those circuits, and also to post other problematic circuits that folks have run across in their work or studies.

So if one of H&H's "Bad Circuits" is bothering you, or if you have run across any examples of errors in schematics that others can learn by, please post them here for others to see and discuss.

I'd like to keep this thread as tutorial as possible, so here are a couple requests:

-1- Please do not post homework problems in this thread. You all know where homework questions should be posted for tutorial help.

-2- If you can see the problem with a circuit easily, please hang back for a bit to let others discuss it, and maybe offer a small clue or two. Students will learn better if there is a discussion about the circuit, rather than hearing the answer early and outright.

That's it for now. I'll pull out my H&H copy and post something on Monday, unless somebody beats me to it.


EDIT -- BTW, we are posting small parts of Horowitz and Hill's textbook under the Fair Use portions of copyright law. They are being used for educational purposes only. Many of us here are fans of this book because of its practical approach to basic electronics, and use of real-world components throughout the course of the book. I encourage you to take a look at the book at your local technical library, or at your bookstore. It is now in it's 2nd edition:

https://www.amazon.com/dp/0521370957/?tag=pfamazon01-20

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[Maxwell]

What an awesome idea.

 

[berkeman]

What an awesome idea.

Yeah, we can thank @ranger for the idea. It came up in a homework help thread last week.

I'll post something here in a few minutes to kick things off.

 

[EugP]

This is a really good idea. Can't wait for it to start.

 

[berkeman]

Okay, here are a couple easy ones to start off with. These are from Chapter 9 ("Digital Meets Analog") of the first edition of H&H, page 450. There are at least two things wrong with each circuit. What are they, and what would be the best way to make things right?

Remember, if it's easy for you, hang back for a bit. We'll get to some harder ones soon enough.


EDIT -- BTW, let me know if this scan is hard to read. If it is, I'll figure out some way to enlarge the attachments in the future.

 

[EugP]

Could you please enlarge the picture? I can't make out the numbers.

 

[berkeman]

Could you please enlarge the picture? I can't make out the numbers.

Okay, I'm still figuring out how best to scan and post these. Here are (a) and (b) enlarged. How's that?

 

[Maxwell]

Well for (b) you need a resistor in front of the LED.

For (a), should the resistor be in series with the cap? I think so.

 

[goldy]

Hello there,
First of i would like to appreciate you for this wonderful idea.
And i think i can answer the second one..
I am not sure, but i think i am right, the two errors are:
1. There is always a resistor connected in serires with LED's because if the applied voltage is more than 1.5V than it get burnt.
2. There is no need to ground a LED.
please don't get angry if i am wrong, i am not sure about this.

 

[berkeman]

Maxwell and goldy are correct that at least a resistor is missing in (b), but that's about all that's correct so far. Keep on thinking them through...

Remember, H&H emphasizes real devices with real datasheet specifications and real-world signals...

 

[goldy]

and in (a)
there is no need to ground a capacitor.

 

[EugP]

Okay, I'm still figuring out how best to scan and post these. Here are (a) and (b) enlarged. How's that?

Perfect, thanks I appreciate it.
I have to be honest, I'm not very familiar with digital logic. I know the basics, but I don't have an in-depth knowledge of digital logic in real life problems and use in circuits.

If I may make a suggestion, I think that if someone posts an answer as to what is wrong with a circuit, they should explain why, just so the people who don't understand (like me ) could learn.

 

[goldy]

Hey EugP,
I am agree with you and I already have explained my first answer.
I am not quite sure with my second answer...

 

[ranger]

Berkeman, I'll give a crack at a) My reasoning is as follows:

As the circuit currently is, it has a RC time delay of 1s. This means that whatever was inputed will show up at the output with a time delay. If a high was the output of the first gate, the cap would take a great deal of time to charge up to that value (5RC). Will the signal of the first gate last that long? Then to discharge, will also take a long time. The issue with large time constants makes a difference because TTL logic uses a fairly narrow range for HIGH and LOW. What if only a short pulse was present at the the output of first gate? Then the final output could more that likely be in the "forbidden region". For cases with large time delays I'd use CMOS logic because of a more forgiving range of HIGH and LOW.

 

[Maxwell]

Yeah, I have a feeling that the RC time constant is too large.

 

[ranger]

and in (a)
there is no need to ground a capacitor.

Hi goldy,

I'm curious as to why you stated this. And also the same for the logic indicator circuit.

 

[goldy]

Hi goldy,

I'm curious as to why you stated this. And also the same for the logic indicator circuit.

Oh i am really very sorry that i have mentioned above, its just a misconception but i am still quite confused with the circuit (b), what is the need to ground the LED.

 

[ranger]

Oh i am really very sorry that i have mentioned above, its just a misconception but i am still quite confused with the circuit (b), what is the need to ground the LED.

[Circuit B]
What would happen if you left it floating?

Also if you didnt ground it, but connected to a voltage terminal of some odd polarity (+6V), would the circuit still function as it should?

 

[edmondng]

For circuit B;

i think for circuit b is should be +5V -> LED -> resistor -> output of logic. the way it has it configured now works (need resistor of course) but just bad practice because the output of the logic is driving the current to power the led.

I'll rather have a source driving the led, and grounding the other side. Much like a ucontroller, make a port be open drain and have the led connect to the source. toggle the port low to turn on led.

Is this right?

 

[chroot]

There are definitely some superficial lessons to be learned here. The second circuit (the one with the LED) will indeed fail catastrophically if you do not put a current-limiting resistor in series with the LED. As soon as you apply power to it, it'll burn itself up.

However, there are actually some much deeper lessons to be learned here, too. Slapping a resistor into the second circuit will prevent it from blowing itself up, but the circuit still won't work well at all. Anyone know why?

- Warren

 

[chroot]

Oh i am really very sorry that i have mentioned above, its just a misconception but i am still quite confused with the circuit (b), what is the need to ground the LED.

Generally speaking, any device with two terminals needs to have both connected in order for it to work at all. In the case of an LED, light is produced by passing current through it. If you only connect one terminal, you obviously have no path for current, so it cannot possibly light up.

- Warren

 

[chroot]

I'll rather have a source driving the led, and grounding the other side. Much like a ucontroller, make a port be open drain and have the led connect to the source. toggle the port low to turn on led.

It doesn't particularly matter if the gate is sourcing or sinking the current -- the current is still going through one of the gate's transistors, and thus is still bad practice.

- Warren

 

[ranger]

However, there are actually some much deeper lessons to be learned here, too. Slapping a resistor into the second circuit will prevent it from blowing itself up, but the circuit still won't work well at all. Anyone know why?

- Warren

Okay, let's see. According to the schematic, the gate is also fanning-out to other logic gates; hence more current. And according to your post #22, this is a bad practice. If I were to build this, I'd use a buffer right after the first gate. And to add to this, TTL based chips have a limited fan-out range when compared to CMOS. Solves the problem? Was that even a problem in the first place?

 

[chroot]

Solves the problem? Was that even a problem in the first place?

Well, can you tell me why fanout matters?

- Warren

 

[edmondng]

It doesn't particularly matter if the gate is sourcing or sinking the current -- the current is still going through one of the gate's transistors, and thus is still bad practice.

- Warren

how about putting a diode after the gate? then it always flow one way only. buffer amp isn't that bad but might as well use an opto isolator

 

[ranger]

Well, can you tell me why fanout matters?

- Warren

Well according to the schematic, the TTL circuit is also driving other gates in addition to the LED. Because TTL logic gates have relatively low input impedance [when compared to CMOS] it would obviously have a more limited range. Once this limit is met, any attempt to drive more logic inputs will cause voltage levels to fall, and with digital logic, that's no good. Hence the need for a buffer (or opto-isolator). I'm of course basing this response because I saw "to other gates" written on the schematic.

 

[chroot]

how about putting a diode after the gate? then it always flow one way only. buffer amp isn't that bad but might as well use an opto isolator

The LED is itself a diode -- current only goes through it in one direction -- so adding another diode would accomplish nothing. I'm also not sure why you bring up opto-isolators. The "sending" half of an opto-isolator is just an LED!

- Warren

 

[chroot]

Well according to the schematic, the TTL circuit is also driving other gates in addition to the LED. Because TTL logic gates have relatively low input impedance [when compared to CMOS] it would obviously have a more limited range. Once this limit is met, any attempt to drive more logic inputs will cause voltage levels to fall, and with digital logic, that's no good. Hence the need for a buffer (or opto-isolator). I'm of course basing this response because I saw "to other gates" written on the schematic.

You're overthinking the distinction between CMOS and TTL here. Fanout matters because gates, when conducting, act like current sources. They source (or sink) current into their load capacitances. This takes time.

If you increase the load capacitance, it will take more time for the gate to charge or discharge it, slowing down your circuit's maximum clock frequency. Similarly, decreasing the gate's output current capability will also slow down your circuit. Connecting an LED this way serves to rob the gate of output current it could be using to charge its load capacitance. This means that the LED will drastically reduce your circuit's maximum clock frequency.

If you're building an essentially DC circuit on a breadboard in an electronics lab, you will never notice this effect -- at all. If you're designing something that you intend to run at even a couple of kilohertz, though, this current-robbing LED will kill your design.

- Warren

 

[berkeman]

Berkeman, I'll give a crack at a) My reasoning is as follows:

As the circuit currently is, it has a RC time delay of 1s. This means that whatever was inputed will show up at the output with a time delay. If a high was the output of the first gate, the cap would take a great deal of time to charge up to that value (5RC). Will the signal of the first gate last that long? Then to discharge, will also take a long time. The issue with large time constants makes a difference because TTL logic uses a fairly narrow range for HIGH and LOW. What if only a short pulse was present at the the output of first gate? Then the final output could more that likely be in the "forbidden region". For cases with large time delays I'd use CMOS logic because of a more forgiving range of HIGH and LOW.

Interesting. I'm not sure H&H did this on purpose, but they might have as a subtle point in (a). When a schematic has 0.001 as a capacitor value, that will mean C=0.001uF. Often in the notes for a schematic, they will say something like "Values shown for inductors are in mH and for capacitors are in uF, unless otherwise noted." I personally always show the prefix and units on caps and inductors on schmatics, but that's up to personal style.

So, the RC time constant of (a) is more like 1ms, but there are still several problems with the circuit. Major hint on (a) -- the input to a digital gate usually has a fast transition time, usually measured in nanoseconds (ns). What issues might arise (there are at least 2 issues) with an input signal that is taking more like 1ms to ramp up or down?


EDIT -- holy smokes! I took too long to type my response...now I'm way behind!

 

[chroot]

What issues might arise (there are at least 2 issues) with an input signal that is taking more like 1ms to ramp up or down?

EDIT -- holy smokes! I took too long to type my response...now I'm way behind!

And now we're on to the third-order problems...

- Warren

 

[berkeman]

Okay, so on (b) you folks have worked through most of it, and I'll summarize the answer(s) soon. But there's another consideration that I'd like to see brought up, even though it's only really true for "TTL" logic, which sees very limited use nowadays.

To save board space and cost, you can drive an LED with a gate in some circumstances, and even drive other logic with that same signal as well. But you have to be sure to check some of the specs for the gates, and make sure that you are not over-taxing the output current capability of the gate. Now, assuming that the gate driving the LED is "TTL" (like 74LSxxx, 74Sxxx, etc.), what would be the best way to connect the LED (plus the series current limiting resistor that you-all have mentioned) in order to most efficiently drive the LED and a few other gates as well? Why?

Do not guess on this one. Read a couple datasheets and reason it out.

I already have another pair of questions that I'll post later today or tomorrow morning. They illustrate a pretty cool (and very important) real-world issue in digital logic.

 

[chroot]

Well, actually berkeman, there's a huge issue left -- one that I thought you were alluding to in your last post. That issue is: power.

When you provide a middle-of-the-road input to a CMOS gate, you'll actually turn on both output transistors simultaneously. These two transistors will fight each other, conducting away your precious battery power. Everytime a gate changes state, the two transistors briefy conduct simultaneously, and this is the only time that a CMOS gate uses any appreciable power besides leakage.

If you apply a very slowly-rising signal to a CMOS gate, you're going to burn up a ton of power until the input rises high enough to turn off the PMOS devices.

Again, this isn't the kind of thing you're going to notice or worry about while bread-boarding in an introductory EE class, but it's a very, very real concern in industrial-quality design.

- Warren

 

[berkeman]

Well, actually berkeman, there's a huge issue left -- one that I thought you were alluding to in your last post. That issue is: power.

When you provide a middle-of-the-road input to a CMOS gate, you'll actually turn on both output transistors simultaneously. These two transistors will fight each other, conducting away your precious battery power. Everytime a gate changes state, the two transistors briefy conduct simultaneously, and this is the only time that a CMOS gate uses any appreciable power besides leakage.

If you apply a very slowly-rising signal to a CMOS gate, you're going to burn up a ton of power until the input rises high enough to turn off the PMOS devices.

Again, this isn't the kind of thing you're going to notice or worry about while bread-boarding in an introductory EE class, but it's a very, very real concern in industrial-quality design.

- Warren

Absolutely, but that's on part (a) of the two circuits. I was referring to the part (b) LED circuit in my previous post. Also, all the gates in these first two circuits are labelled "TTL", so the power issue in (a) is less important than if they were CMOS.

So to summarize where we are, we need the fundamental problem still to be identified in (a), and how can we reconfigure (b) to be more practical and support some amount of fan-out?

 

[chroot]

Whoops! You're right berkeman, I was getting the two circuits confused.

- Warren

 

[dlgoff]

If you're designing something that you intend to run at even a couple of kilohertz, though, this current-robbing LED will kill your design.

You are correct of course, but when would you ever want an LED that you wouldn't be able to see it blinking that fast?

 

[dlgoff]

How about a transistor to drive the LED? It'll cost a little board space however.

 

[berkeman]

How about a transistor to drive the LED? It'll cost a little board space however.

Yeah, that is one solution, but I was asking more about when you really do just want to use a TTL gate to drive the LED and maybe something else.

BTW, good point about being able to see the LED. But, I can think of other LED applications where you would be pulsing it at speed. Think IR remote controls, or IR/visible signal transmission (using modulation codes to improve SNR), etc.

 

[berkeman]

Okay, I think I'll tie off the two bad circuits in Post #7 -- page 440 (1st edition), circuits (a) and (b) in the Digital Meets Analog chapter.

(a) The main problem illustrated is that you should not present a TTL input with a slowly increasing or decreasing signal. A standard TTL (or CMOS) input has very little or no hysteresis, so as the signal slowly goes through the input transition region, noise on the input (or output switching noise conducted back into the input circuitry) can cause the gate to switch back and forth several times while the input signal is in the transition region. This causes output buzz during the switching interval, which usually causes further problems downstream (like if it feeds a counter, then the number of real input pulses will be greatly over-counted. And as chroot points out for CMOS inputs, you get a *big* increase in Idd current for the gate if you hold the input in the middle of the transition region for any length of time.

But this circuit is used a lot, as long as the 2nd gate is a Schmidtt trigger gate, which means it has an explicit input hysteresis voltage, and that voltage is usually large enough to prevent noise from causing extra output transitions while the slow input signal goes through the transition region. See the datasheet for the 74AS132 Quad 2-input NAND gate, for example.

Another secondary problem with this circuit is that you shouldn't use TTL gates if you want a symmetrical transition delay for high-to-low and low-to-high transitions. TTL input and output trigger levels are not very symmetrical -- instead, use a CMOS Schmitt trigger gate for the 2nd gate, and some compatible CMOS gate for the 1st gate.


(b) Remember that TTL has an asymmetric output drive structure ("bipolar BJT totem pole"), so it typically sinks current better than it can drive it. Check out the Ioh and Iol output current drive specs on a datasheet for something like 74S or 74LS series logic. So to drive an LED, you will typically pull down to turn it on, and add the series resistor to the LED to set the LED current. Some LEDs come with built-in resistors, but it is usually cheaper to just use a jellybean resistor with the LED unless board area is at a huge premium. In order to fan out and drive some more gates, you need to factor in the current that you are investing in the LED drive, and make sure that any additional gates that you drive will still see the Vil voltage that they expect. You probably wouldn't drive more than one more gate, and you could then use that buffer gate to fan out to the usual number of other gates with the slightly delayed copy of the original signal.


Hope that all makes sense. Now for another couple of bad circuits...

 

[berkeman]

How about a couple opamp circuits? These show a couple of the most common errors that EE students (and new EEs!) make when working with simple opamp circuits. These are from Chapter 3 of Horowitz and Hill on opamps.

Same as before -- if you know the answers easily, please hang back to let others work on them. And for those posting possible answers, please do not guess! Check out some datasheets for typical representative components, and see if you can see some specifications that are being violated...

 

[ranger]

How about a couple opamp circuits? These show a couple of the most common errors that EE students (and new EEs!) make when working with simple opamp circuits. These are from Chapter 3 of Horowitz and Hill on opamps.

Same as before -- if you know the answers easily, please hang back to let others work on them. And for those posting possible answers, please do not guess! Check out some datasheets for typical representative components, and see if you can see some specifications that are being violated...

[Circuit A]
Berkeman, I'm so used to working with ideal views of the op-amp, that when I need to take device limitations into account, I get stalled...
But looking at the circuit, I see no resistor, so when the diode is conducting, current will flow without limitation and will thus damage the very delicate 741?

Can give some more hints with regards to circuit A?-

 

[berkeman]

[Circuit A]
Berkeman, I'm so used to working with ideal views of the op-amp, that when I need to take device limitations into account, I get stalled...
But looking at the circuit, I see no resistor, so when the diode is conducting, current will flow without limitation and will thus damage the very delicate 741?

Can give some more hints with regards to circuit A?-

That's one of the problems with (a), and as you say, it could be fixed with a resistor between the opamp output and the diode's anode (the "output" of the circuit).

There's one more problem with (a), and it has to do with the potentiometer.

 

[ranger]

There's one more problem with (a), and it has to do with the potentiometer.

They could have used a rheostat to handle the higher power dissipations? And also, when pot is "maxed out", we'll be putting about 30V into the op-amp. According to the datasheet, we're pushing the limits of the 741 here. No?

 

[berkeman]

They could have used a rheostat to handle the higher power dissipations? And also, when pot is "maxed out", we'll be putting about 30V into the op-amp. According to the datasheet, we're pushing the limits of the 741 here. No?

Nope. The pot looks like it is connected to the same rails as the opamp. The opamp rails aren't shown, but it would be pretty standard to run it between those +/-15V rails.

Here's a very good (classic) primer on potentiometers from Bourns:

http://www.bourns.com/pdfs/trmrpmr.pdf

Hint -- the issue has to do with "Dry Circuit Conditions"...

 

[antonantal]

So, in time it is possible that an oxide film will form at the contact of the wiper in the potentiometer. And because of the very low input current of the opamp, there will not be enough punch through voltage at the wiper contact to break down the oxide and the input of the opamp will remain isolated.

Would a resistor from the +15V or -15V rail to the wiper solve the problem?

 

[berkeman]

So, in time it is possible that an oxide film will form at the contact of the wiper in the potentiometer. And because of the very low input current of the opamp, there will not be enough punch through voltage at the wiper contact to break down the oxide and the input of the opamp will remain isolated.

Would a resistor from the +15V or -15V rail to the wiper solve the problem?

Correct! It is a common mistake to ignore the minimum wiper current specification for a trimpot. The Bourns application note suggests 10uA to 100uA, but the potentiometer datasheet should list the number for whichever pot you are using. The LM741 input bias current is well below these numbers, so you can't just connect the wiper to the opamp input alone. And yes, you would do something more like what you are suggesting, where you connect the CW side of the pot to +15V, connect the wiper to the CCW side of the pot (Quiz Question -- why the CCW side?), and use another resistor down to -15V in a voltage divider arrangement to vary the input voltage to the opamp, while meeting the wiper current and power rating for the trim pot.

Good job. And now all of that should provide the hint necessary to solve circuit (b)...

 

[ranger]

So, in time it is possible that an oxide film will form at the contact of the wiper in the potentiometer. And because of the very low input current of the opamp, there will not be enough punch through voltage at the wiper contact to break down the oxide and the input of the opamp will remain isolated.

Would a resistor from the +15V or -15V rail to the wiper solve the problem?

Correct! It is a common mistake to ignore the minimum wiper current specification for a trimpot. The Bourns application note suggests 10uA to 100uA, but the potentiometer datasheet should list the number for whichever pot you are using. The LM741 input bias current is well below these numbers, so you can't just connect the wiper to the opamp input alone. And yes, you would do something more like what you are suggesting, where you connect the CW side of the pot to +15V, connect the wiper to the CCW side of the pot (Quiz Question -- why the CCW side?), and use another resistor down to -15V in a voltage divider arrangement to vary the input voltage to the opamp, while meeting the wiper current and power rating for the trim pot.

Good job. And now all of that should provide the hint necessary to solve circuit (b)...

Wow, I just learned something really useful here!

 

[ranger]

For circuit b, I think we need resistor from the non-inverting input to ground as a return path for the very small input current. Also if one wishes to work with small signals of varying frequency, the resistor will also help to set the cut-off frequency for ac signals (f_3dB).

 

[antonantal]

Quiz Question -- why the CCW side?

Because we want maximum input voltage to the opamp when the potentiometer is turned all the way in the CW direction.

If we connect the wiper to the CCW end, when we turn the pot all the way in the CW direction the wiper shorts the resistance of the pot and all the voltage will be droped on the resistor connected from the CCW end to the -15V rail, and we have maximum voltage at the input of the opamp.


If we connect the wiper to the CW end of the pot, when we turn it all the way in the CW direction the whole resistance of the pot enters in the voltage divider and we have minimum voltage at the input of the opamp.

 

[berkeman]

For circuit b, I think we need resistor from the non-inverting input to ground as a return path for the very small input current. Also if one wishes to work with small signals of varying frequency, the resistor will also help to set the cut-off frequency for ac signals (f_3dB).

Ding, ding, ding! Another correct answer. So to summarize the answers for the two circuits in Post #39:

(a) The top opamp output needs a series resistor before the clamp diode, and needs a different potentiometer connection to ensure that the pot's minimum wiper current spec is met.

(b) A DC path is needed to supply the opamp's input bias current.

Both of these are very common errors, as I said before.

I'll post another circuit here in a little bit...

 

[berkeman]

Because we want maximum input voltage to the opamp when the potentiometer is turned all the way in the CW direction.

If we connect the wiper to the CCW end, when we turn the pot all the way in the CW direction the wiper shorts the resistance of the pot and all the voltage will be droped on the resistor connected from the CCW end to the -15V rail, and we have maximum voltage at the input of the opamp.


If we connect the wiper to the CW end of the pot, when we turn it all the way in the CW direction the whole resistance of the pot enters in the voltage divider and we have minimum voltage at the input of the opamp.

Excellent. Whenever you are putting a pot into a circuit, stop and think about how the behavior of the circuit is going to be changed by turning the pot, and be sure to make the behavior happen in the natural/intuitive way. Turning a pot CW should increase volume, or increase voltage, or ... etc.