AC-DC voltage sources-capacitor-diode

[Rampart]

Homework Statement

For the following circuit assume that the diode is ideal and that the time constant RC is very big compared to the period of the generator.Find the v(out).

2. Relevant information
Thought to start this with the superposition theorem.(I wrote it wrong in the pdf btw)
And when i had reached the stage with only the AC source,even though it seemed very alike to the capacitor-input filter,i couldn't do anything,as the diode was after the capacitor,so i improvised and i am not proud of it.

The Attempt at a Solution

Here is the pdf.I am almost certain it is not right and i have many questions that i will pose after the first instructions.Not all together.Don't want to scare you off.

 

[gneill]

If you ignore the diode branch for a moment, what would the signal on the output look like?

You might want to start with a qualitative assessment of the behavior of the circuit. For example, what are the implications of the choice of time constant?

Can the capacitor's potential difference (that is, its charge) change significantly over the period of a cycle of the AC signal if its only discharge path is via R?

Imagine that the time constant is so very large that you have the luxury of of replacing the AC source with a manually adjustable supply. The scene begins with the adjustable supply at 0 V and the rest of the circuit at steady state (the 5 V supply has had time to charge the capacitor to a 5 V difference via R). The output voltage is currently at 0 V, so the diode branch is not conducting (its threshold value being 10 V). Now you being to increase the adjustable supply voltage upwards from zero in the direction of +20 V. Current via R is negligible thanks to the large time constant, so consider the capacitor potential difference to be constant while you adjust the supply. How does Vout behave? When does a significant change in the scenario occur? What is the change?

 

[rude man]

Forget the superposition theorem. It applies to linear circuits only. This is not a linear circuit thanks to the diode.

Notice one thing: when C charges there is no series resistance. So C charges to max voltage first time the ac source hits max. Making the output voltage what? While on the other hand it can only discharge thru the relatively large R.

So what must be the output voltage? (assume didode drop = 0V).

 

[Rampart]

Firstly let me thank you gentlemen for your time.Now let's cut to the chase.

Forget the superposition theorem. It applies to linear circuits only. This is not a linear circuit thanks to the diode.

I wasn't aware of that.However now in this particular exercise,in which it happens the diode to be ideal,can't i substitute it with a switch and use superposition?

when C charges there is no series resistance. So C charges to max voltage first time the ac source hits max

I totally lost you.I must be missing something...How we got from<<there is no series resistance>> to <<So C charges to max etc etc>>?Can you explain a little more?

You might want to start with a qualitative assessment of the behavior of the circuit. For example, what are the implications of the choice of time constant?

About the time constant i read that,being that bigger than the period,the capacitor doesn't have the time to either fully charge or fully discharge.So because of this difference between them,we can assume that the voltage in the capacitor is steady.Right?

Can the capacitor's potential difference (that is, its charge) change significantly over the period of a cycle of the AC signal if its only discharge path is via R?

Well no,because of difference between the time constant and the period?

Current via R is negligible thanks to the large time constant, so consider the capacitor potential difference to be constant while you adjust the supply

About that.If the time constant is theoritically infinite times bigger than the period,can i assume that the voltage across the capacitor is 0(in case it had 0 charge in that point)?So that is one of the cases why it is said,that in ac circuits the capacitor is like a short circuit?

Well i cannot understand the relation between the large time constant and the negligible current.It seems to me as the resistance has similar behavior with the ac source.2 extra questions from the ones i had before your replies,so as to reduce the amount a bit.

1)When the current flows through the capacitor,doesn't it <<prefer>> to go through the diode(ideal) and the dc voltage source(zero resistance in that branch),instead going through the resistance?If that is the case can't i remove the resistance?
2)I can place a ground wherever i want,and do the calculations in relation with it,right?

 

[gneill]

Firstly let me thank you gentlemen for your time.Now let's cut to the chase.I wasn't aware of that.However now in this particular exercise,in which it happens the diode to be ideal,can't i substitute it with a switch and use superposition?

You can but you must throw out AC steady state analysis techniques in this case since the switching takes place within a single AC cycle. So the circuit topology changes within each AC cycle and you must deal with transient response for each segment.

I totally lost you.I must be missing something...How we got from<<there is no series resistance>> to <<So C charges to max etc etc>>?Can you explain a little more?

When the ideal diode conducts (with zero resistance) there is a loop containing the capacitor that consists solely of voltage supplies across it. The voltage supplies dictate the voltage across the capacitor since there is no series resistance in that loop. The resistor has a fixed 10 V across it from the diode branch's supply so its current is fixed and provided entirely from the 10 V source. Essentially it's a separate, isolated loop.

About the time constant i read that,being that bigger than the period,the capacitor doesn't have the time to either fully charge or fully discharge.So because of this difference between them,we can assume that the voltage in the capacitor is steady.Right?

Right. The time constant is considered to be very large, so during the relatively short times that the diode is "off" the capacitor charge will be effectively constant.

Well no,because of difference between the time constant and the period?

Right.

About that.If the time constant is theoritically infinite times bigger than the period,can i assume that the voltage across the capacitor is 0(in case it had 0 charge in that point)?So that is one of the cases why it is said,that in ac circuits the capacitor is like a short circuit?

The impedance of a capacitor depends upon the AC frequency involved. Sometimes it is useful to choose a relatively large capacitance to pass AC frequencies of interest with little attenuation while blocking any DC component.

Well i cannot understand the relation between the large time constant and the negligible current.It seems to me as the resistance has similar behavior with the ac source.

That's true enough. When you choose RC >> 1/f then the impedance of C will be << R, and the voltage divider formed by C and R will have very little attenuation.

2 extra questions from the ones i had before your replies,so as to reduce the amount a bit.

1)When the current flows through the capacitor,doesn't it <<prefer>> to go through the diode(ideal) and the dc voltage source(zero resistance in that branch),instead going through the resistance?If that is the case can't i remove the resistance?

Perhaps its better to say that since the ideal diode has zero resistance when it conducts then the potential across the resistor is fixed by the 10 V source. The node at the top of the resistor has become a supernode of the ground node (assuming we choose the bottom rail as the reference node). Any current through the resistor can be wholly satisfied by the 10 V source.

In this case the current through the resistor becomes irrelevant to the rest of the circuit since its effectively isolated by the 10 V source. So yes, you can ignore the resistor.

2)I can place a ground wherever i want,and do the calculations in relation with it,right?

Sure.

 

[rude man]

Firstly let me thank you gentlemen for your time.Now let's cut to the chase.I wasn't aware of that.However now in this particular exercise,in which it happens the diode to be ideal,can't i substitute it with a switch and use superposition?

No. The thing that makes the circuit nonlinear is the fact that the diode conducts in only one direction.

I totally lost you.I must be missing something...How we got from<<there is no series resistance>> to <<So C charges to max etc etc>>?Can you explain a little more?

C charges to a voltage of the peak voltage on its left side minus the 10V battery voltage on its right side on the 1st ac cycle.. Is there a subsequent significant discharge path anywhere? Remember the statement that the RC time constant is much larger than the time of 1 cycle of the ac source.
Hint: you showed a diagram with R missing. You didn't give the right reason, but that move is good. Why?.

About the time constant i read that, being that bigger than the period,the capacitor doesn't have the time to either fully charge or fully discharge.So because of this difference between them,we can assume that the voltage in the capacitor is steady.Right?

Very right! Not only does it not fully discharge but effectively there is no further voltage change across the capacitor after the 1st cycle is completed. So what is that capacitor voltage after the 1st cycle?

2 extra questions from the ones i had before your replies,so as to reduce the amount a bit.

1)When the current flows through the capacitor,doesn't it <<prefer>> to go through the diode(ideal) and the dc voltage source(zero resistance in that branch),instead going through the resistance?If that is the case can't i remove the resistance?

You can, but the reason has to do with the relative RC time constant and the period of the ac source.
Keep one thing in mind: if there is no charge or discharge path, a capacitor retains its voltage so if one side's voltage changes for whatever reason, the other side must follow volt for volt.

 

[Rampart]

Still confused.Let me ask you some more.

1)I read that if we have in a circuit both DC and AC voltage sources,then we analyze them seperately.For DC analysis i open all the capacitors.For AC analysis
i substitute all DC voltage sources with AC grounds and i substitute the capacitors(coupling-bypass capacitors) with short circuits.So there are capacitors i cannot substitute with short circuits right?

2)If i do what i told earlier then in DC analysis(opening the capacitor) i get that VR=Vout=10V.
If i do in AC analysis what i said then i have the AC source connected across with both the resistance and the diode(resistance and diode in parallel).Now the current will
<<prefer>>(for the reasons you well explained) to pass through the diode.So current through resistance almost zero.So ac voltage through resistance almost zero?
And basically because the diode is ideal,the AC source cannot have any impact on R(=Vout) the way i see it.But earlier we reached to the point that it has the same behavior with the AC source,so it does have an impact on Vout.So we reach to the point that in this case i cannot substitute it with a short circuit?

3)If in a circuit there is absolutely no reference to steady states,switches(open-closed) etc can i substitute them with either short or open circuits(depends on source)?Because it is a little confusing.In first and second order circuit analysis,it is very different.We don't just open the capacitor,we find relations.But in other books,without any reference to even tell us that it was in steady state,it just opens the capacitors and move on with the calculations.I am not sure if made myself clear...

C charges to a voltage of the peak voltage on its left side minus the 10V battery voltage on its right side on the 1st ac cycle.. Is there a subsequent significant discharge path anywhere? Remember the statement that the RC time constant is much larger than the time of 1 cycle of the ac source.
Hint: you showed a diagram with R missing. You didn't give the right reason, but that move is good. Why?.

Because it cannot discharge once charged?

So what is that capacitor voltage after the 1st cycle?

You said that it charges to a voltage of the peak voltage on the left minus the 10 battery voltage,so i assume it starts from -10,rises up to +10 and stays there.

But i have a question
4)How can it reach the peak,if the difference between time constant and period is that big.I mean it needs 4-5 time constants to get fully charged,but during just one time constant the AC source would probably have done many cycles.How does it allow the capacitor to reach the peak?

 

[rude man]

Still confused.Let me ask you some more.

1)I read that if we have in a circuit both DC and AC voltage sources,then we analyze them seperately.For DC analysis i open all the capacitors.For AC analysis
i substitute all DC voltage sources with AC grounds and i substitute the capacitors(coupling-bypass capacitors) with short circuits.So there are capacitors i cannot substitute with short circuits right?

2)If i do what i told earlier then in DC analysis(opening the capacitor) i get that VR=Vout=10V.
If i do in AC analysis what i said then i have the AC source connected across with both the resistance and the diode(resistance and diode in parallel).Now the current will
<<prefer>>(for the reasons you well explained) to pass through the diode.So current through resistance almost zero.So ac voltage through resistance almost zero?
And basically because the diode is ideal,the AC source cannot have any impact on R(=Vout) the way i see it.But earlier we reached to the point that it has the same behavior with the AC source,so it does have an impact on Vout.So we reach to the point that in this case i cannot substitute it with a short circuit?

3)If in a circuit there is absolutely no reference to steady states,switches(open-closed) etc can i substitute them with either short or open circuits(depends on source)?Because it is a little confusing.In first and second order circuit analysis,it is very different.We don't just open the capacitor,we find relations.But in other books,without any reference to even tell us that it was in steady state,it just opens the capacitors and move on with the calculations.I am not sure if made myself clear...

Your foregoing applies to linear, time-invariant ("LTI") circuits. This is a non linear circuit. It must be dealt with differently from linear circuits.
Forget all those rules, most of them are irrelevant. You have to apply basic electronics, such as accounting for disparate charge and discharge paths, cutoff voltages, etc.

Because it cannot discharge once charged?

Yes. Keep that uppermost in mind.

You said that it charges to a voltage of the peak voltage on the left minus the 10 battery voltage,so i assume it starts from -10,rises up to +10 and stays there.

What is the peak voltage on the left? What is that minus 10V?

But i have a question
4)How can it reach the peak,if the difference between time constant and period is that big.I mean it needs 4-5 time constants to get fully charged,but during just one time constant the AC source would probably have done many cycles.How does it allow the capacitor to reach the peak?

The capacitor has zero resistance as it charges to its peak on the 1st cycle. Why would it need 4-5 cycles to charge? Hey, I thought we all (incl. gneill) agreed that R can be omitted altogether? So omit it!

 

[Rampart]

Your foregoing applies to linear, time-invariant ("LTI") circuits. This is a non linear circuit. It must be dealt with differently from linear circuits.
Forget all those rules, most of them are irrelevant. You have to apply basic electronics, such as accounting for disparate charge and discharge paths, cutoff voltages, etc.

Ah for these as well huh?Well it is a lot clearer now.

What is the peak voltage on the left? What is that minus 10V?

I believe i forgot the 5 DC voltage source.Wouldn't it be 5-10=-5 volt.Meaning C charges to a voltage of the peak voltage on its left side minus the 5V battery voltage on its right
What is the peak voltage?It is 20 now.Or peak is 25 and it would go minus 10 instead of minus 5.Did you mean that or something else?

The capacitor has zero resistance as it charges to its peak on the 1st cycle. Why would it need 4-5 cycles to charge? Hey, I thought we all (incl. gneill) agreed that R can be omitted altogether? So omit it!

Well i made a wrong assumption.I believed that the removal of the resistance only had practical meaning for the calculations(current,voltage) and that it wouldn't affect the time constant.

Now a question about this .Well i read that the resistance plays no role,as far as the peak of the charge of the capacitor is concerned.However it does play a role on the speed eh,i mean on how fast or slow the charge or the discharge will take place.Also i read that the charge or discharge don't happen in an instance.So if we assume that R=0 and we omit it,will the capacitor charge to its peak following entirely the AC voltage's rythme?

 

[rude man]

Ah for these as well huh?Well it is a lot clearer now.I believe i forgot the 5 DC voltage source.Wouldn't it be 5-10=-5 volt.Meaning C charges to a voltage of the peak voltage on its left side minus the 5V battery voltage on its right
What is the peak voltage? It is 20 now.Or peak is 25 and it would go minus 10 instead of minus 5.Did you mean that or something else?

I meant that. 25 - 10 = 15V. The battery on the right is 10V, not 5.

Now a question about this .Well i read that the resistance plays no role,as far as the peak of the charge of the capacitor is concerned.However it does play a role on the speed eh,i mean on how fast or slow the charge or the discharge will take place.Also i read that the charge or discharge don't happen in an instance.

The charge follows the ac sine wave on its way up. There is no time constant to slow it down. But it can only discharge via R. See the blatant asymmetry?

So if we assume that R=0 and we omit it, will the capacitor charge to its peak following entirely the AC voltage's rythme?

R=0 is not omitting it! Quite the contrary.
The exact Vout over the 1st cycle is complicated by the fact that the phasing of the ac source comes into play. But, once the ac voltage hits +20V, C is fully charged and stays that way. You should now be able to draw Vout for the steady-state (after 1 cycle of ac.)

 

[Rampart]

Well thanks you to you sir and to mrGneill ofc, many questions were answered and now i can see the problem a lot better than before.I am grateful.

 

[rude man]

Well thanks you to you sir and to mrGneill ofc, many questions were answered and now i can see the problem a lot better than before.I am grateful.

Don't be discouraged. Nonlinear circuits are much harder to figure out than LTI ones. When you see a diode in a circuit, chances are you should panic!

 

[gneill]

Don't be discouraged. Nonlinear circuits are much harder to figure out than LTI ones. When you see a diode in a circuit, chances are you should panic! :)

I wholeheartedly agree with rude man. Some of these circuits can leave you wondering how anyone ever came up with idea for their implementation.

When the mental knots induced by a nonlinear circuit threaten to lead to crossed eyes and nosebleeds, I suggest resorting to a simulation tool to see if you can gain insight by observing how various parts of the circuit are behaving. With a free tool like LTspice you can set up the circuit in a minute or two and then tinker with different component values and arrangements while you build experience. After a while you'll start to develop an intuition about how to best go about breaking them down for analysis.

 

[Rampart]

Yes you are right,they seem harsh but i don't get easily discouraged.I downloaded LTspice and i will work with it.Moreover,i will keep posting more exercises and questions as i move.So for now,goodnight :)